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openwrt/target/linux/mediatek/dts/mt7981b-asus-rt-ax52.dts
Rosen Penev c186d17fa5 treewide: replace numbers with GPIO_ACTIVE
The latter is more descriptive in terms of what's going on.

Mostly found with

git grep gpios\  | grep 0\>
git grep gpios\  | grep 1\>

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20116
Signed-off-by: Robert Marko <robimarko@gmail.com>
2025-10-08 14:26:24 +02:00

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "mt7981b.dtsi"
/ {
model = "ASUS RT-AX52";
compatible = "asus,rt-ax52", "mediatek,mt7981";
aliases {
serial0 = &uart0;
label-mac-device = &gmac0;
led-boot = &led_system;
led-failsafe = &led_system;
led-running = &led_system;
led-upgrade = &led_system;
};
chosen {
stdout-path = "serial0:115200n8";
bootargs-override = "";
};
memory@40000000 {
reg = <0 0x40000000 0 0x10000000>;
device_type = "memory";
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
wlan24 {
function = LED_FUNCTION_WLAN_2GHZ;
color = <LED_COLOR_ID_WHITE>;
gpios = <&pio 34 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
wlan5 {
function = LED_FUNCTION_WLAN_5GHZ;
color = <LED_COLOR_ID_WHITE>;
gpios = <&pio 35 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
wan {
function = LED_FUNCTION_WAN;
color = <LED_COLOR_ID_BLUE>;
gpios = <&pio 8 GPIO_ACTIVE_LOW>;
};
led_system: system {
label = "blue:system";
gpios = <&pio 12 GPIO_ACTIVE_HIGH>;
};
};
timer {
clock-frequency = <12996791>;
};
};
&uart0 {
status = "okay";
};
&eth {
status = "okay";
gmac0: mac@0 {
/* LAN */
compatible = "mediatek,eth-mac";
reg = <0>;
nvmem-cells = <&macaddr_factory_4>;
nvmem-cell-names = "mac-address";
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
gmac1: mac@1 {
/* WAN */
compatible = "mediatek,eth-mac";
reg = <1>;
nvmem-cells = <&macaddr_factory_4>;
nvmem-cell-names = "mac-address";
phy-mode = "gmii";
phy-handle = <&phy0>;
label = "wan";
};
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
compatible = "ethernet-phy-id03a2.9461";
reg = <0>;
phy-mode = "gmii";
#nvmem-cells = <&phy_calibration>;
#nvmem-cell-names = "phy-cal-data";
};
switch@1f {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan3";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan1";
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
spi_nand_flash: flash@0 {
compatible = "u-boot-dont-touch-spi-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
/*
* ASUS bootloader tries to replace the partitions defined in
* Device Tree and by that also deletes all additional properties
* needed for UBI and NVMEM-on-UBI.
* Prevent this from happening by tricking the loader to delete and
* replace a bait node instead (works with older bootloaders).
*/
partitions: dummy {
compatible = "u-boot-dummy-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x0 0x0>;
label = "remove_me";
};
};
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x0 0x400000>;
label = "bootloader";
read-only;
};
partition@400000 {
compatible = "linux,ubi";
reg = <0x400000 0xfc00000>;
label = "UBI_DEV";
volumes {
ubi_factory: ubi-volume-factory {
volname = "Factory";
};
};
};
};
};
};
&ubi_factory {
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x1000>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
};
&spi1 {
pinctrl-names = "default";
pinctrl-0 = <&spic_pins>;
status = "disabled";
};
&pio {
i2c_pins: i2c-pins-g0 {
mux {
function = "i2c";
groups = "i2c0_0";
};
};
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
spic_pins: spi1-pins {
mux {
function = "spi";
groups = "spi1_1";
};
};
uart1_pins: uart1-pins-g1 {
mux {
function = "uart";
groups = "uart1_1";
};
};
uart2_pins: uart2-pins-g1 {
mux {
function = "uart";
groups = "uart2_1";
};
};
};
&watchdog {
status = "okay";
};
&wifi {
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
status = "okay";
};