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openwrt/target/linux/ath79/dts/ar7242_ubnt_sw.dtsi
Shiji Yang c2e5bded8d treewide: dts: fix spi-gpio chip select GPIO polarity
The SPI chip select GPIO polarity is active low by default. We must
use "spi-cs-high" dts property to toggle the polarity. The polarity
on "cs-gpios" won't take effect at all[1]. Fix these incorrect GPIO
polarities to silence the kernel warnings.

[1] Refer to Linux/Documentation/devicetree/bindings/spi/spi-controller.yaml
```
      device node     | cs-gpio       | CS pin state active | Note
      ================+===============+=====================+=====
      spi-cs-high     | -             | H                   |
      -               | -             | L                   |
      spi-cs-high     | ACTIVE_HIGH   | H                   |
      -               | ACTIVE_HIGH   | L                   | 1
      spi-cs-high     | ACTIVE_LOW    | H                   | 2
      -               | ACTIVE_LOW    | L                   |

      Notes:
      1) Should print a warning about polarity inversion.
         Here it would be wise to avoid and define the gpio as
         ACTIVE_LOW.
      2) Should print a warning about polarity inversion
         because ACTIVE_LOW is overridden by spi-cs-high.
         Should be generally avoided and be replaced by
         spi-cs-high + ACTIVE_HIGH.
```

Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19845
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2025-10-20 00:28:15 +02:00

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "ar7242.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "qca,ar7242";
model = "Ubiquiti Networks SW board";
chosen {
bootargs = "console=ttyS0,115200n8";
};
aliases {
led-boot = &led_usr;
led-failsafe = &led_usr;
led-running = &led_usr;
led-upgrade = &led_usr;
};
leds {
compatible = "gpio-leds";
led_usr: usr {
label = "yellow:usr";
gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
};
};
keys {
compatible = "gpio-keys";
reset {
linux,code = <KEY_RESTART>;
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
gpio_spi {
compatible = "spi-gpio";
#address-cells = <1>;
#size-cells = <0>;
sck-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
mosi-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
num-chipselects = <1>;
gpio_hc595: gpio_spi@0 {
compatible = "fairchild,74hc595";
reg = <0>;
registers-number = <2>;
spi-max-frequency = <100000>;
enable-gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
gpio-controller;
#gpio-cells = <2>;
};
};
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x000000 0x040000>;
label = "u-boot";
read-only;
};
partition@40000 {
reg = <0x040000 0x010000>;
label = "u-boot-env";
read-only;
};
partition@50000 {
compatible = "denx,uimage";
reg = <0x050000 0x760000>;
label = "firmware";
};
partition@7b0000 {
reg = <0x7b0000 0x040000>;
label = "cfg";
read-only;
};
partition@7f0000 {
reg = <0x7f0000 0x010000>;
label = "art";
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_art_0: macaddr@0 {
reg = <0x0 0x6>;
};
macaddr_art_6: macaddr@6 {
reg = <0x6 0x6>;
};
};
};
};
};
};
&usb_phy {
status = "okay";
};
&usb {
status = "okay";
};
&pcie {
status = "okay";
};
&eth1 {
status = "okay";
nvmem-cells = <&macaddr_art_6>;
nvmem-cell-names = "mac-address";
};