forked from mirror/openwrt
31e56f0340
As part of the previous commit to add the #clock-cells property to the
GE PHY, the PHY was inadvertently moved under the second mdio node in
the dtsi, and therefore broke the init sequence as the driver was trying
to use the wrong mdio bus to set the init values (ex. DAC, MSE, and AZ).
So let's move it back under the right mdio node and, while at it, pad
the register addresses to 8 hex numbers and re-order properties in line
with Linux DTS coding standards.
Fixes:
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| .. | ||
| files | ||
| image | ||
| ipq50xx | ||
| ipq60xx | ||
| ipq807x | ||
| patches-6.6 | ||
| config-6.6 | ||
| Makefile | ||