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Author SHA1 Message Date
Daniel Golle
0ac2d64d92 kernel: modules: i2c: package i2c-mux-pinctrl
Create kernel module package for i2c-mux-pinctrl.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2025-07-19 13:54:22 +01:00
Daniel Golle
801529f725 targets: add PINCTRL_SUPPORT auto-feature
Not all targets have CONFIG_PINCTRL=y set in their kernel config.
Let's introduce a feature for that so kernel module packages which
select or depend on CONFIG_PINCTRL=y may depend on that, so we can
try to prevent leaking CONFIG_PINCTRL=y also into targets which do
not require it.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2025-07-19 13:54:22 +01:00
Daniel Golle
58f0f87786 uboot-mediatek: refresh patches
Refresh patch which has been made before the update to 2025.07 and
doesn't apply cleanly any more.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2025-07-19 13:52:46 +01:00
Shiji Yang
324d13dc35 uboot-mediatek: backport filogic clk driver fix
This patch can fix the crash when initializing the mmc device.

Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
2025-07-19 13:52:20 +01:00
6 changed files with 140 additions and 3 deletions

View file

@ -315,6 +315,9 @@ ifeq ($(DUMP),1)
ifneq ($(CONFIG_PCIEPORTBUS),)
FEATURES += pcie
endif
ifneq ($(CONFIG_PINCTRL),)
FEATURES += pinctrl
endif
ifneq ($(CONFIG_PWM),)
FEATURES += pwm
endif

View file

@ -0,0 +1,114 @@
From 1bf212129768d65a47145209c65bf37b6082d718 Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Tue, 6 May 2025 16:12:20 +0800
Subject: [PATCH] clk: mediatek: add dummy clk enable/disable ops for
apmixedsys clocks
Starting from commit ac30d90f336 (clk: Ensure the parent clocks are enabled
while reparenting), MediaTek filogic platforms will crash on booting when
initializing mmc devices.
The root cause is that to simplify the code, we reused the topckgen ops for
apmixedsys clocks as they share the get_rate with topckgen clocks while the
clk enable/disable ops are not available for apmixedsys clocks.
Now that a clock will be enabled first before reparenting, we have to add
dummy enable/disable ops for apmixedsys to avoid unexpected behavior when
apmixedsys clocks are the parent clock of the to-be-reparenting clocks.
Fixes: 40746bf429d (clk: mediatek: add clock driver support for MediaTek MT7981 SoC)
Fixes: 37d5a9a29dc (clk: mediatek: add clock driver support for MediaTek MT7986 SoC)
Fixes: ece4e5804f5 (clk: mediatek: add clock driver support for MediaTek MT7987 SoC)
Fixes: 421436981a2 (clk: mediatek: add clock driver support for MediaTek MT7988 SoC)
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
drivers/clk/mediatek/clk-mt7981.c | 2 +-
drivers/clk/mediatek/clk-mt7986.c | 2 +-
drivers/clk/mediatek/clk-mt7987.c | 2 +-
drivers/clk/mediatek/clk-mt7988.c | 2 +-
drivers/clk/mediatek/clk-mtk.c | 11 +++++++++++
drivers/clk/mediatek/clk-mtk.h | 1 +
6 files changed, 16 insertions(+), 4 deletions(-)
--- a/drivers/clk/mediatek/clk-mt7981.c
+++ b/drivers/clk/mediatek/clk-mt7981.c
@@ -566,7 +566,7 @@ U_BOOT_DRIVER(mtk_clk_apmixedsys) = {
.of_match = mt7981_fixed_pll_compat,
.probe = mt7981_fixed_pll_probe,
.priv_auto = sizeof(struct mtk_clk_priv),
- .ops = &mtk_clk_topckgen_ops,
+ .ops = &mtk_clk_fixed_pll_ops,
.flags = DM_FLAG_PRE_RELOC,
};
--- a/drivers/clk/mediatek/clk-mt7986.c
+++ b/drivers/clk/mediatek/clk-mt7986.c
@@ -573,7 +573,7 @@ U_BOOT_DRIVER(mtk_clk_apmixedsys) = {
.of_match = mt7986_fixed_pll_compat,
.probe = mt7986_fixed_pll_probe,
.priv_auto = sizeof(struct mtk_clk_priv),
- .ops = &mtk_clk_topckgen_ops,
+ .ops = &mtk_clk_fixed_pll_ops,
.flags = DM_FLAG_PRE_RELOC,
};
--- a/drivers/clk/mediatek/clk-mt7987.c
+++ b/drivers/clk/mediatek/clk-mt7987.c
@@ -67,7 +67,7 @@ U_BOOT_DRIVER(mtk_clk_apmixedsys) = {
.of_match = mt7987_fixed_pll_compat,
.probe = mt7987_fixed_pll_probe,
.priv_auto = sizeof(struct mtk_clk_priv),
- .ops = &mtk_clk_topckgen_ops,
+ .ops = &mtk_clk_fixed_pll_ops,
.flags = DM_FLAG_PRE_RELOC,
};
--- a/drivers/clk/mediatek/clk-mt7988.c
+++ b/drivers/clk/mediatek/clk-mt7988.c
@@ -830,7 +830,7 @@ U_BOOT_DRIVER(mtk_clk_apmixedsys) = {
.of_match = mt7988_fixed_pll_compat,
.probe = mt7988_fixed_pll_probe,
.priv_auto = sizeof(struct mtk_clk_priv),
- .ops = &mtk_clk_topckgen_ops,
+ .ops = &mtk_clk_fixed_pll_ops,
.flags = DM_FLAG_PRE_RELOC,
};
--- a/drivers/clk/mediatek/clk-mtk.c
+++ b/drivers/clk/mediatek/clk-mtk.c
@@ -47,6 +47,11 @@ static int mtk_clk_get_id(struct clk *cl
return id;
}
+static int mtk_dummy_enable(struct clk *clk)
+{
+ return 0;
+}
+
static int mtk_gate_enable(void __iomem *base, const struct mtk_gate *gate)
{
u32 bit = BIT(gate->shift);
@@ -752,6 +757,12 @@ const struct clk_ops mtk_clk_apmixedsys_
.get_rate = mtk_apmixedsys_get_rate,
};
+const struct clk_ops mtk_clk_fixed_pll_ops = {
+ .enable = mtk_dummy_enable,
+ .disable = mtk_dummy_enable,
+ .get_rate = mtk_topckgen_get_rate,
+};
+
const struct clk_ops mtk_clk_topckgen_ops = {
.enable = mtk_clk_mux_enable,
.disable = mtk_clk_mux_disable,
--- a/drivers/clk/mediatek/clk-mtk.h
+++ b/drivers/clk/mediatek/clk-mtk.h
@@ -283,6 +283,7 @@ struct mtk_cg_priv {
};
extern const struct clk_ops mtk_clk_apmixedsys_ops;
+extern const struct clk_ops mtk_clk_fixed_pll_ops;
extern const struct clk_ops mtk_clk_topckgen_ops;
extern const struct clk_ops mtk_clk_infrasys_ops;
extern const struct clk_ops mtk_clk_gate_ops;

View file

@ -13,7 +13,7 @@ Signed-off-by: Enrico Mioso <mrkiko.rs@gmail.com>
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -691,19 +691,13 @@ static void initcall_run_r(void)
@@ -706,19 +706,13 @@ static void initcall_run_r(void)
INITCALL(serial_initialize);
INITCALL(initr_announce);
INITCALL(dm_announce);
@ -33,7 +33,7 @@ Signed-off-by: Enrico Mioso <mrkiko.rs@gmail.com>
#if CONFIG_IS_ENABLED(PCI_INIT_R) && CONFIG_IS_ENABLED(SYS_EARLY_PCI_INIT)
/*
* Do early PCI configuration _before_ the flash gets initialised,
@@ -718,7 +712,6 @@ static void initcall_run_r(void)
@@ -733,7 +727,6 @@ static void initcall_run_r(void)
#if CONFIG_IS_ENABLED(MTD_NOR_FLASH)
INITCALL(initr_flash);
#endif
@ -41,7 +41,7 @@ Signed-off-by: Enrico Mioso <mrkiko.rs@gmail.com>
#if CONFIG_IS_ENABLED(PPC) || CONFIG_IS_ENABLED(M68K) || CONFIG_IS_ENABLED(X86)
/* initialize higher level parts of CPU like time base and timers */
INITCALL(cpu_init_r);
@@ -744,6 +737,10 @@ static void initcall_run_r(void)
@@ -762,6 +755,10 @@ static void initcall_run_r(void)
#if CONFIG_IS_ENABLED(PVBLOCK)
INITCALL(initr_pvblock);
#endif

View file

@ -288,6 +288,22 @@ endef
$(eval $(call KernelPackage,i2c-mux-mlxcpld))
I2C_MUX_PINCTRL_MODULES:= \
CONFIG_I2C_MUX_PINCTRL:drivers/i2c/muxes/i2c-mux-pinctrl
define KernelPackage/i2c-mux-pinctrl
$(call i2c_defaults,$(I2C_MUX_PINCTRL_MODULES),51)
TITLE:=Pinctrl-based I2C mux/switches
DEPENDS:=@PINCTRL_SUPPORT @USES_DEVICETREE +kmod-i2c-mux
endef
define KernelPackage/i2c-mux-pinctrl/description
Kernel modules for Pinctrl-based I2C bus mux/switching devices
endef
$(eval $(call KernelPackage,i2c-mux-pinctrl))
I2C_MUX_REG_MODULES:= \
CONFIG_I2C_MUX_REG:drivers/i2c/muxes/i2c-mux-reg

View file

@ -33,6 +33,7 @@ sub target_config_features(@) {
/^pci$/ and $ret .= "\tselect PCI_SUPPORT\n";
/^pcie$/ and $ret .= "\tselect PCIE_SUPPORT\n";
/^pcmcia$/ and $ret .= "\tselect PCMCIA_SUPPORT\n";
/^pinctrl$/ and $ret .= "\tselect PINCTRL_SUPPORT\n";
/^powerpc64$/ and $ret .= "\tselect powerpc64\n";
/^pwm$/ and $ret .= "\select PWM_SUPPORT\n";
/^ramdisk$/ and $ret .= "\tselect USES_INITRAMFS\n";

View file

@ -32,6 +32,9 @@ config PCIE_SUPPORT
config PCMCIA_SUPPORT
bool
config PINCTRL_SUPPORT
bool
config PWM_SUPPORT
bool