forked from mirror/openwrt
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11 commits
5303f6330b
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36337da8d2
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36337da8d2 | ||
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b0c2aa4594 | ||
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a308d3b2fd | ||
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467b7c0dc6 | ||
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d03f65a8f2 | ||
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c4064c55bd | ||
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33daed47df | ||
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e034b99e04 | ||
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6213bb69f7 | ||
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3196fca3a7 | ||
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e3389e2783 |
71 changed files with 9 additions and 8827 deletions
|
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@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk
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|||
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||||
PKG_NAME:=libpcap
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||||
PKG_VERSION:=1.10.5
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||||
PKG_RELEASE:=2
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||||
PKG_RELEASE:=3
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||||
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
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PKG_SOURCE_URL:=https://www.tcpdump.org/release/
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|||
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@ -7,7 +7,7 @@
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include $(TOPDIR)/rules.mk
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PKG_NAME:=toolchain
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PKG_RELEASE:=4
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PKG_RELEASE:=5
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||||
PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
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PKG_LICENSE:=GPL-3.0-with-GCC-exception
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|
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|||
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@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk
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PKG_NAME:=dropbear
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PKG_VERSION:=2025.88
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PKG_RELEASE:=1
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PKG_RELEASE:=2
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PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
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PKG_SOURCE_URL:= \
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|||
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@ -10,7 +10,7 @@ include $(INCLUDE_DIR)/kernel.mk
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PKG_NAME:=ppp
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PKG_VERSION:=2.5.2
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PKG_RELEASE:=1
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PKG_RELEASE:=2
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PKG_SOURCE_PROTO:=git
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PKG_SOURCE_URL:=https://github.com/ppp-project/ppp
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|||
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@ -8,7 +8,7 @@
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include $(TOPDIR)/rules.mk
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PKG_NAME:=uhttpd
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PKG_RELEASE:=4
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PKG_RELEASE:=5
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|
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PKG_SOURCE_PROTO:=git
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PKG_SOURCE_URL=$(PROJECT_GIT)/project/uhttpd.git
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|||
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@ -8,7 +8,7 @@
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include $(TOPDIR)/rules.mk
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PKG_NAME:=rpcd
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PKG_RELEASE:=1
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PKG_RELEASE:=2
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|
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PKG_SOURCE_PROTO:=git
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PKG_SOURCE_URL=$(PROJECT_GIT)/project/rpcd.git
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|||
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@ -6,7 +6,7 @@ include $(TOPDIR)/rules.mk
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|
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PKG_NAME:=busybox
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PKG_VERSION:=1.37.0
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PKG_RELEASE:=4
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PKG_RELEASE:=5
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PKG_FLAGS:=essential
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PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
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@ -7,7 +7,7 @@ include $(TOPDIR)/rules.mk
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PKG_NAME:=policycoreutils
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PKG_VERSION:=3.8.1
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PKG_RELEASE:=1
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PKG_RELEASE:=2
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PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
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PKG_SOURCE_URL:=https://github.com/SELinuxProject/selinux/releases/download/$(PKG_VERSION)
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@ -9,8 +9,7 @@ BOARDNAME:=Arm SystemReady (EFI) compliant
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FEATURES:=fpu pci pcie rtc usb boot-part rootfs-part
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FEATURES+=cpiogz ext4 ramdisk squashfs targz vmdk
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KERNEL_PATCHVER:=6.6
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KERNEL_TESTING_PATCHVER:=6.12
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KERNEL_PATCHVER:=6.12
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include $(INCLUDE_DIR)/target.mk
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|
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DEFAULT_PACKAGES += mkf2fs e2fsprogs
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|||
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@ -1,83 +0,0 @@
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CONFIG_ALIGNMENT_TRAP=y
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||||
CONFIG_ARCH_32BIT_OFF_T=y
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||||
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
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||||
CONFIG_ARCH_MMAP_RND_BITS=8
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||||
CONFIG_ARCH_MULTIPLATFORM=y
|
||||
# CONFIG_ARCH_MULTI_V4 is not set
|
||||
# CONFIG_ARCH_MULTI_V4T is not set
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||||
CONFIG_ARCH_MULTI_V6_V7=y
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||||
CONFIG_ARCH_MULTI_V7=y
|
||||
CONFIG_ARCH_NR_GPIO=0
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||||
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
|
||||
CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
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||||
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
|
||||
CONFIG_ARCH_VIRT=y
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||||
CONFIG_ARM=y
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||||
CONFIG_ARM_CPU_SUSPEND=y
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||||
CONFIG_ARM_HAS_SG_CHAIN=y
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||||
CONFIG_ARM_HEAVY_MB=y
|
||||
# CONFIG_ARM_HIGHBANK_CPUIDLE is not set
|
||||
CONFIG_ARM_L1_CACHE_SHIFT=6
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CONFIG_ARM_L1_CACHE_SHIFT_6=y
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||||
CONFIG_ARM_LPAE=y
|
||||
CONFIG_ARM_PATCH_IDIV=y
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||||
CONFIG_ARM_PATCH_PHYS_VIRT=y
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CONFIG_ARM_PSCI=y
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||||
CONFIG_ARM_THUMB=y
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||||
CONFIG_ARM_UNWIND=y
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CONFIG_ARM_VIRT_EXT=y
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CONFIG_AUTO_ZRELADDR=y
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||||
CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
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||||
CONFIG_CACHE_L2X0=y
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||||
CONFIG_COMPAT_32BIT_TIME=y
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CONFIG_CPU_32v6K=y
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CONFIG_CPU_32v7=y
|
||||
CONFIG_CPU_ABRT_EV7=y
|
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CONFIG_CPU_CACHE_V7=y
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CONFIG_CPU_CACHE_VIPT=y
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||||
CONFIG_CPU_COPY_V6=y
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CONFIG_CPU_CP15=y
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||||
CONFIG_CPU_CP15_MMU=y
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||||
# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
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CONFIG_CPU_HAS_ASID=y
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CONFIG_CPU_PABRT_V7=y
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||||
CONFIG_CPU_SPECTRE=y
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CONFIG_CPU_THUMB_CAPABLE=y
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CONFIG_CPU_TLB_V7=y
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CONFIG_CPU_V7=y
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CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
|
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CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
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CONFIG_DMA_OPS=y
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CONFIG_EDAC_ATOMIC_SCRUB=y
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||||
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
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||||
CONFIG_GENERIC_VDSO_32=y
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CONFIG_HARDEN_BRANCH_PREDICTOR=y
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||||
CONFIG_HAVE_SMP=y
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CONFIG_HZ_FIXED=0
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CONFIG_HZ_PERIODIC=y
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CONFIG_MIGHT_HAVE_CACHE_L2X0=y
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CONFIG_MODULES_USE_ELF_REL=y
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CONFIG_NEON=y
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||||
CONFIG_NR_CPUS=4
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CONFIG_OLD_SIGACTION=y
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CONFIG_OLD_SIGSUSPEND3=y
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CONFIG_OUTER_CACHE=y
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CONFIG_OUTER_CACHE_SYNC=y
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CONFIG_PAGE_OFFSET=0xC0000000
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CONFIG_PERF_USE_VMALLOC=y
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CONFIG_PHYS_OFFSET=0
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CONFIG_RTC_MC146818_LIB=y
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CONFIG_SERIAL_OF_PLATFORM=y
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CONFIG_SMP_ON_UP=y
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CONFIG_SWP_EMULATE=y
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CONFIG_SYS_SUPPORTS_APM_EMULATION=y
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CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
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CONFIG_UNWINDER_ARM=y
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# CONFIG_UNWINDER_FRAME_POINTER is not set
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CONFIG_USE_OF=y
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CONFIG_VFP=y
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CONFIG_VFPv3=y
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CONFIG_XZ_DEC_ARM=y
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CONFIG_XZ_DEC_BCJ=y
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CONFIG_ZBOOT_ROM_BSS=0x0
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CONFIG_ZBOOT_ROM_TEXT=0x0
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@ -1,863 +0,0 @@
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CONFIG_64BIT=y
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CONFIG_ACPI_APEI=y
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# CONFIG_ACPI_FFH is not set
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# CONFIG_ACPI_FPDT is not set
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CONFIG_ACPI_HMAT=y
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CONFIG_ACPI_PCC=y
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CONFIG_AHCI_IMX=y
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CONFIG_AHCI_MVEBU=y
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CONFIG_AHCI_QORIQ=y
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CONFIG_AMPERE_ERRATUM_AC03_CPU_38=y
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CONFIG_ARCH_BCM=y
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CONFIG_ARCH_BCM2835=y
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# CONFIG_ARCH_BCMBCA is not set
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CONFIG_ARCH_BCM_IPROC=y
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CONFIG_ARCH_BRCMSTB=y
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CONFIG_ARCH_HISI=y
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CONFIG_ARCH_INTEL_SOCFPGA=y
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CONFIG_ARCH_LAYERSCAPE=y
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CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y
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CONFIG_ARCH_MMAP_RND_BITS=18
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CONFIG_ARCH_MMAP_RND_BITS_MAX=24
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CONFIG_ARCH_MMAP_RND_BITS_MIN=18
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CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
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CONFIG_ARCH_MVEBU=y
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CONFIG_ARCH_MXC=y
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CONFIG_ARCH_NXP=y
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CONFIG_ARCH_PROC_KCORE_TEXT=y
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CONFIG_ARCH_R8A774A1=y
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CONFIG_ARCH_R8A774B1=y
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CONFIG_ARCH_R8A774C0=y
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CONFIG_ARCH_R8A774E1=y
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# CONFIG_ARCH_R8A77950 is not set
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||||
# CONFIG_ARCH_R8A77951 is not set
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# CONFIG_ARCH_R8A77960 is not set
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# CONFIG_ARCH_R8A77961 is not set
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||||
# CONFIG_ARCH_R8A77965 is not set
|
||||
# CONFIG_ARCH_R8A77970 is not set
|
||||
# CONFIG_ARCH_R8A77980 is not set
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# CONFIG_ARCH_R8A77990 is not set
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# CONFIG_ARCH_R8A77995 is not set
|
||||
# CONFIG_ARCH_R8A779A0 is not set
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# CONFIG_ARCH_R8A779F0 is not set
|
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# CONFIG_ARCH_R8A779G0 is not set
|
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CONFIG_ARCH_R9A07G043=y
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CONFIG_ARCH_R9A07G044=y
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CONFIG_ARCH_R9A07G054=y
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CONFIG_ARCH_R9A09G011=y
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CONFIG_ARCH_RENESAS=y
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_ARCH_STACKWALK=y
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CONFIG_ARCH_SUNXI=y
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CONFIG_ARCH_SYNQUACER=y
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CONFIG_ARCH_THUNDER=y
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CONFIG_ARCH_THUNDER2=y
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CONFIG_ARCH_VEXPRESS=y
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CONFIG_ARCH_WANTS_NO_INSTR=y
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CONFIG_ARCH_ZYNQMP=y
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||||
CONFIG_ARM64=y
|
||||
CONFIG_ARM64_4K_PAGES=y
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CONFIG_ARM64_AMU_EXTN=y
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CONFIG_ARM64_BTI=y
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CONFIG_ARM64_CRYPTO=y
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CONFIG_ARM64_E0PD=y
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CONFIG_ARM64_ERRATUM_1024718=y
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CONFIG_ARM64_ERRATUM_1165522=y
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CONFIG_ARM64_ERRATUM_1286807=y
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CONFIG_ARM64_ERRATUM_1319367=y
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CONFIG_ARM64_ERRATUM_1418040=y
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CONFIG_ARM64_ERRATUM_1463225=y
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CONFIG_ARM64_ERRATUM_1508412=y
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CONFIG_ARM64_ERRATUM_1530923=y
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CONFIG_ARM64_ERRATUM_1542419=y
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CONFIG_ARM64_ERRATUM_1742098=y
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CONFIG_ARM64_ERRATUM_2051678=y
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CONFIG_ARM64_ERRATUM_2054223=y
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CONFIG_ARM64_ERRATUM_2067961=y
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||||
CONFIG_ARM64_ERRATUM_2077057=y
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||||
CONFIG_ARM64_ERRATUM_2441007=y
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CONFIG_ARM64_ERRATUM_2441009=y
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CONFIG_ARM64_ERRATUM_2457168=y
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||||
CONFIG_ARM64_ERRATUM_2658417=y
|
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CONFIG_ARM64_ERRATUM_819472=y
|
||||
CONFIG_ARM64_ERRATUM_824069=y
|
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CONFIG_ARM64_ERRATUM_826319=y
|
||||
CONFIG_ARM64_ERRATUM_827319=y
|
||||
CONFIG_ARM64_ERRATUM_832075=y
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||||
CONFIG_ARM64_ERRATUM_834220=y
|
||||
CONFIG_ARM64_ERRATUM_843419=y
|
||||
CONFIG_ARM64_ERRATUM_845719=y
|
||||
CONFIG_ARM64_HW_AFDBM=y
|
||||
CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y
|
||||
CONFIG_ARM64_MTE=y
|
||||
CONFIG_ARM64_PAGE_SHIFT=12
|
||||
CONFIG_ARM64_PA_BITS=48
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CONFIG_ARM64_PA_BITS_48=y
|
||||
CONFIG_ARM64_PTR_AUTH=y
|
||||
CONFIG_ARM64_PTR_AUTH_KERNEL=y
|
||||
CONFIG_ARM64_RAS_EXTN=y
|
||||
CONFIG_ARM64_SME=y
|
||||
CONFIG_ARM64_SVE=y
|
||||
CONFIG_ARM64_TAGGED_ADDR_ABI=y
|
||||
CONFIG_ARM64_TLB_RANGE=y
|
||||
CONFIG_ARM64_VA_BITS=48
|
||||
CONFIG_ARM64_VA_BITS_48=y
|
||||
CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y
|
||||
CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y
|
||||
CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y
|
||||
CONFIG_ARM64_WORKAROUND_TSB_FLUSH_FAILURE=y
|
||||
# CONFIG_ARMADA_37XX_RWTM_MBOX is not set
|
||||
CONFIG_ARMADA_37XX_WATCHDOG=y
|
||||
CONFIG_ARMADA_THERMAL=y
|
||||
CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y
|
||||
# CONFIG_ARM_DMC620_PMU is not set
|
||||
# CONFIG_ARM_MHU_V2 is not set
|
||||
CONFIG_ARM_PSCI_CPUIDLE=y
|
||||
CONFIG_ARM_PSCI_CPUIDLE_DOMAIN=y
|
||||
CONFIG_ARM_SBSA_WATCHDOG=y
|
||||
CONFIG_ARM_SCPI_POWER_DOMAIN=y
|
||||
CONFIG_ARM_SCPI_PROTOCOL=y
|
||||
CONFIG_ARM_SMCCC_SOC_ID=y
|
||||
CONFIG_ARM_SMC_WATCHDOG=y
|
||||
CONFIG_ARM_SMMU=y
|
||||
# CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT is not set
|
||||
# CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS is not set
|
||||
CONFIG_ARM_SMMU_V3=y
|
||||
# CONFIG_ARM_SMMU_V3_PMU is not set
|
||||
# CONFIG_ARM_SMMU_V3_SVA is not set
|
||||
CONFIG_ATOMIC64_SELFTEST=y
|
||||
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
|
||||
# CONFIG_AXI_DMAC is not set
|
||||
CONFIG_BACKLIGHT_CLASS_DEVICE=y
|
||||
# CONFIG_BCM2711_THERMAL is not set
|
||||
CONFIG_BCM2835_MBOX=y
|
||||
CONFIG_BCM2835_POWER=y
|
||||
# CONFIG_BCM2835_THERMAL is not set
|
||||
# CONFIG_BCM2835_VCHIQ is not set
|
||||
CONFIG_BCM2835_WDT=y
|
||||
# CONFIG_BCMASP is not set
|
||||
# CONFIG_BCMGENET is not set
|
||||
# CONFIG_BCM_CYGNUS_PHY is not set
|
||||
# CONFIG_BCM_FLEXRM_MBOX is not set
|
||||
# CONFIG_BCM_NS_THERMAL is not set
|
||||
# CONFIG_BCM_PDC_MBOX is not set
|
||||
# CONFIG_BCM_SR_THERMAL is not set
|
||||
CONFIG_BCM_VIDEOCORE=y
|
||||
# CONFIG_BGMAC_PLATFORM is not set
|
||||
CONFIG_BLK_PM=y
|
||||
# CONFIG_BRCMSTB_PM is not set
|
||||
# CONFIG_BRCMSTB_THERMAL is not set
|
||||
CONFIG_BRCM_USB_PINMAP=y
|
||||
CONFIG_CAVIUM_ERRATUM_22375=y
|
||||
CONFIG_CAVIUM_ERRATUM_23144=y
|
||||
CONFIG_CAVIUM_ERRATUM_23154=y
|
||||
CONFIG_CAVIUM_ERRATUM_27456=y
|
||||
CONFIG_CAVIUM_ERRATUM_30115=y
|
||||
CONFIG_CAVIUM_TX2_ERRATUM_219=y
|
||||
CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y
|
||||
CONFIG_CLK_BCM2711_DVP=y
|
||||
CONFIG_CLK_BCM2835=y
|
||||
CONFIG_CLK_BCM_NS2=y
|
||||
CONFIG_CLK_BCM_SR=y
|
||||
CONFIG_CLK_IMX8MM=y
|
||||
CONFIG_CLK_IMX8MN=y
|
||||
CONFIG_CLK_IMX8MP=y
|
||||
CONFIG_CLK_IMX8MQ=y
|
||||
CONFIG_CLK_IMX8QXP=y
|
||||
CONFIG_CLK_IMX8ULP=y
|
||||
CONFIG_CLK_IMX93=y
|
||||
CONFIG_CLK_INTEL_SOCFPGA=y
|
||||
CONFIG_CLK_INTEL_SOCFPGA64=y
|
||||
CONFIG_CLK_LS1028A_PLLDIG=y
|
||||
CONFIG_CLK_PX30=y
|
||||
CONFIG_CLK_QORIQ=y
|
||||
CONFIG_CLK_RASPBERRYPI=y
|
||||
CONFIG_CLK_RCAR_USB2_CLOCK_SEL=y
|
||||
CONFIG_CLK_RENESAS=y
|
||||
CONFIG_CLK_RK3308=y
|
||||
CONFIG_CLK_RK3328=y
|
||||
CONFIG_CLK_RK3368=y
|
||||
CONFIG_CLK_RK3399=y
|
||||
CONFIG_CLK_RK3568=y
|
||||
CONFIG_CLK_RK3588=y
|
||||
CONFIG_CLK_SP810=y
|
||||
CONFIG_CLK_SUNXI=y
|
||||
CONFIG_CLK_SUNXI_CLOCKS=y
|
||||
# CONFIG_CLK_SUNXI_PRCM_SUN6I is not set
|
||||
# CONFIG_CLK_SUNXI_PRCM_SUN8I is not set
|
||||
# CONFIG_CLK_SUNXI_PRCM_SUN9I is not set
|
||||
CONFIG_CLK_VEXPRESS_OSC=y
|
||||
CONFIG_CMA=y
|
||||
CONFIG_CMA_ALIGNMENT=8
|
||||
CONFIG_CMA_AREAS=19
|
||||
# CONFIG_CMA_DEBUG is not set
|
||||
# CONFIG_CMA_DEBUGFS is not set
|
||||
CONFIG_CMA_SIZE_MBYTES=32
|
||||
# CONFIG_CMA_SIZE_SEL_MAX is not set
|
||||
CONFIG_CMA_SIZE_SEL_MBYTES=y
|
||||
# CONFIG_CMA_SIZE_SEL_MIN is not set
|
||||
# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
|
||||
# CONFIG_CMA_SYSFS is not set
|
||||
# CONFIG_COMMON_CLK_FSL_FLEXSPI is not set
|
||||
# CONFIG_COMMON_CLK_FSL_SAI is not set
|
||||
CONFIG_COMMON_CLK_HI3516CV300=y
|
||||
CONFIG_COMMON_CLK_HI3519=y
|
||||
CONFIG_COMMON_CLK_HI3559A=y
|
||||
CONFIG_COMMON_CLK_HI3660=y
|
||||
CONFIG_COMMON_CLK_HI3670=y
|
||||
CONFIG_COMMON_CLK_HI3798CV200=y
|
||||
CONFIG_COMMON_CLK_HI6220=y
|
||||
CONFIG_COMMON_CLK_HI655X=y
|
||||
CONFIG_COMMON_CLK_ROCKCHIP=y
|
||||
CONFIG_COMMON_CLK_SCPI=y
|
||||
CONFIG_COMMON_CLK_ZYNQMP=y
|
||||
CONFIG_COMMON_RESET_HI3660=y
|
||||
CONFIG_COMMON_RESET_HI6220=y
|
||||
# CONFIG_COMPAT_32BIT_TIME is not set
|
||||
CONFIG_CPU_IDLE=y
|
||||
CONFIG_CPU_IDLE_GOV_MENU=y
|
||||
CONFIG_CPU_LITTLE_ENDIAN=y
|
||||
CONFIG_CPU_PM=y
|
||||
CONFIG_CRYPTO_AES_ARM64=y
|
||||
CONFIG_CRYPTO_AES_ARM64_BS=y
|
||||
CONFIG_CRYPTO_AES_ARM64_CE=y
|
||||
CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
|
||||
CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
|
||||
CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y
|
||||
CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=y
|
||||
CONFIG_CRYPTO_CHACHA20=y
|
||||
CONFIG_CRYPTO_CHACHA20_NEON=y
|
||||
CONFIG_CRYPTO_CRYPTD=y
|
||||
# CONFIG_CRYPTO_DEV_ALLWINNER is not set
|
||||
# CONFIG_CRYPTO_DEV_BCM_SPU is not set
|
||||
# CONFIG_CRYPTO_DEV_FSL_DPAA2_CAAM is not set
|
||||
# CONFIG_CRYPTO_DEV_HISI_HPRE is not set
|
||||
# CONFIG_CRYPTO_DEV_HISI_SEC2 is not set
|
||||
# CONFIG_CRYPTO_DEV_HISI_TRNG is not set
|
||||
# CONFIG_CRYPTO_DEV_OCTEONTX2_CPT is not set
|
||||
# CONFIG_CRYPTO_DEV_ROCKCHIP is not set
|
||||
# CONFIG_CRYPTO_DEV_ZYNQMP_AES is not set
|
||||
# CONFIG_CRYPTO_DEV_ZYNQMP_SHA3 is not set
|
||||
CONFIG_CRYPTO_GHASH_ARM64_CE=y
|
||||
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
|
||||
CONFIG_CRYPTO_LIB_CHACHA_GENERIC=y
|
||||
CONFIG_CRYPTO_POLYVAL_ARM64_CE=y
|
||||
CONFIG_CRYPTO_SHA1=y
|
||||
CONFIG_CRYPTO_SHA1_ARM64_CE=y
|
||||
CONFIG_CRYPTO_SHA256_ARM64=y
|
||||
CONFIG_CRYPTO_SHA2_ARM64_CE=y
|
||||
CONFIG_CRYPTO_SHA512_ARM64=y
|
||||
CONFIG_CRYPTO_SIMD=y
|
||||
# CONFIG_CRYPTO_SM4_ARM64_CE_BLK is not set
|
||||
# CONFIG_CRYPTO_SM4_ARM64_CE_CCM is not set
|
||||
# CONFIG_CRYPTO_SM4_ARM64_CE_GCM is not set
|
||||
# CONFIG_CRYPTO_SM4_ARM64_NEON_BLK is not set
|
||||
# CONFIG_DEV_DAX_HMEM is not set
|
||||
CONFIG_DMA_BCM2835=y
|
||||
CONFIG_DMA_CMA=y
|
||||
CONFIG_DMA_DIRECT_REMAP=y
|
||||
# CONFIG_DMA_NUMA_CMA is not set
|
||||
CONFIG_DMA_SHARED_BUFFER=y
|
||||
CONFIG_DMA_SUN6I=y
|
||||
CONFIG_DRM=y
|
||||
CONFIG_DRM_BOCHS=y
|
||||
CONFIG_DRM_BRIDGE=y
|
||||
# CONFIG_DRM_FSL_LDB is not set
|
||||
CONFIG_DRM_GEM_SHMEM_HELPER=y
|
||||
# CONFIG_DRM_HYPERV is not set
|
||||
# CONFIG_DRM_IMX8QM_LDB is not set
|
||||
# CONFIG_DRM_IMX8QXP_LDB is not set
|
||||
# CONFIG_DRM_IMX8QXP_PIXEL_COMBINER is not set
|
||||
# CONFIG_DRM_IMX8QXP_PIXEL_LINK is not set
|
||||
# CONFIG_DRM_IMX8QXP_PIXEL_LINK_TO_DPI is not set
|
||||
# CONFIG_DRM_IMX_DCSS is not set
|
||||
# CONFIG_DRM_IMX_LCDC is not set
|
||||
CONFIG_DRM_KMS_HELPER=y
|
||||
CONFIG_DRM_PANEL=y
|
||||
CONFIG_DRM_PANEL_BRIDGE=y
|
||||
# CONFIG_DRM_PANEL_HIMAX_HX8394 is not set
|
||||
# CONFIG_DRM_PANEL_JADARD_JD9365DA_H3 is not set
|
||||
# CONFIG_DRM_PANEL_NEWVISION_NV3051D is not set
|
||||
# CONFIG_DRM_PANEL_NOVATEK_NT36523 is not set
|
||||
CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y
|
||||
# CONFIG_DRM_PANEL_SONY_TD4353_JDI is not set
|
||||
# CONFIG_DRM_PANEL_STARTEK_KD070FHFID015 is not set
|
||||
# CONFIG_DRM_PANEL_VISIONOX_R66451 is not set
|
||||
# CONFIG_DRM_PANEL_VISIONOX_VTDR6130 is not set
|
||||
CONFIG_DRM_QXL=y
|
||||
# CONFIG_DRM_RCAR_DU is not set
|
||||
# CONFIG_DRM_ROCKCHIP is not set
|
||||
# CONFIG_DRM_RZG2L_MIPI_DSI is not set
|
||||
# CONFIG_DRM_SHMOBILE is not set
|
||||
CONFIG_DRM_TTM=y
|
||||
CONFIG_DRM_TTM_HELPER=y
|
||||
# CONFIG_DRM_V3D is not set
|
||||
CONFIG_DRM_VIRTIO_GPU=y
|
||||
CONFIG_DRM_VIRTIO_GPU_KMS=y
|
||||
CONFIG_DRM_VRAM_HELPER=y
|
||||
# CONFIG_DWMAC_SUN8I is not set
|
||||
# CONFIG_DWMAC_SUNXI is not set
|
||||
CONFIG_DW_WATCHDOG=y
|
||||
CONFIG_EFI_CAPSULE_LOADER=y
|
||||
CONFIG_EFI_CUSTOM_SSDT_OVERLAYS=y
|
||||
CONFIG_EFI_SOFT_RESERVE=y
|
||||
CONFIG_EFI_VARS_PSTORE=y
|
||||
# CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE is not set
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_ARMCLCD=y
|
||||
CONFIG_FB_CFB_COPYAREA=y
|
||||
CONFIG_FB_CFB_FILLRECT=y
|
||||
CONFIG_FB_CFB_IMAGEBLIT=y
|
||||
CONFIG_FB_CMDLINE=y
|
||||
CONFIG_FB_HYPERV=y
|
||||
CONFIG_FB_MODE_HELPERS=y
|
||||
CONFIG_FB_MX3=y
|
||||
# CONFIG_FB_SH_MOBILE_LCDC is not set
|
||||
# CONFIG_FB_XILINX is not set
|
||||
CONFIG_FRAME_POINTER=y
|
||||
# CONFIG_FSL_DPAA is not set
|
||||
# CONFIG_FSL_DPAA2_QDMA is not set
|
||||
CONFIG_FSL_ERRATUM_A008585=y
|
||||
# CONFIG_FSL_IMX8_DDR_PMU is not set
|
||||
# CONFIG_FSL_IMX9_DDR_PMU is not set
|
||||
# CONFIG_FSL_PQ_MDIO is not set
|
||||
CONFIG_FUJITSU_ERRATUM_010001=y
|
||||
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
|
||||
CONFIG_GENERIC_CSUM=y
|
||||
CONFIG_GENERIC_FIND_FIRST_BIT=y
|
||||
# CONFIG_GIANFAR is not set
|
||||
CONFIG_GPIO_BCM_XGS_IPROC=y
|
||||
CONFIG_GPIO_BRCMSTB=y
|
||||
CONFIG_GPIO_GENERIC=y
|
||||
CONFIG_GPIO_GENERIC_PLATFORM=y
|
||||
CONFIG_GPIO_MPC8XXX=y
|
||||
CONFIG_GPIO_MXC=y
|
||||
CONFIG_GPIO_RASPBERRYPI_EXP=y
|
||||
CONFIG_GPIO_ROCKCHIP=y
|
||||
CONFIG_GPIO_THUNDERX=y
|
||||
CONFIG_GPIO_XLP=y
|
||||
CONFIG_GPIO_ZYNQ=y
|
||||
CONFIG_GPIO_ZYNQMP_MODEPIN=y
|
||||
CONFIG_HDMI=y
|
||||
CONFIG_HI3660_MBOX=y
|
||||
CONFIG_HI6220_MBOX=y
|
||||
# CONFIG_HID_HYPERV_MOUSE is not set
|
||||
CONFIG_HISILICON_ERRATUM_161600802=y
|
||||
CONFIG_HISILICON_LPC=y
|
||||
CONFIG_HISI_PMU=y
|
||||
CONFIG_HISI_THERMAL=y
|
||||
CONFIG_HOTPLUG_PCI=y
|
||||
CONFIG_HOTPLUG_PCI_ACPI=y
|
||||
# CONFIG_HOTPLUG_PCI_ACPI_IBM is not set
|
||||
# CONFIG_HOTPLUG_PCI_CPCI is not set
|
||||
# CONFIG_HOTPLUG_PCI_PCIE is not set
|
||||
# CONFIG_HOTPLUG_PCI_SHPC is not set
|
||||
CONFIG_HW_RANDOM=y
|
||||
CONFIG_HW_RANDOM_ARM_SMCCC_TRNG=y
|
||||
# CONFIG_HW_RANDOM_HISI is not set
|
||||
# CONFIG_HW_RANDOM_HISTB is not set
|
||||
CONFIG_HW_RANDOM_VIRTIO=y
|
||||
CONFIG_HYPERV=y
|
||||
# CONFIG_HYPERV_BALLOON is not set
|
||||
CONFIG_HYPERV_KEYBOARD=y
|
||||
CONFIG_HYPERV_NET=y
|
||||
CONFIG_HYPERV_STORAGE=y
|
||||
# CONFIG_HYPERV_TESTING is not set
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_ALGOBIT=y
|
||||
CONFIG_I2C_ALTERA=y
|
||||
# CONFIG_I2C_BCM2835 is not set
|
||||
CONFIG_I2C_BOARDINFO=y
|
||||
# CONFIG_I2C_HIX5HD2 is not set
|
||||
CONFIG_I2C_IMX=y
|
||||
CONFIG_I2C_IMX_LPI2C=y
|
||||
CONFIG_I2C_RIIC=y
|
||||
# CONFIG_I2C_RZV2M is not set
|
||||
# CONFIG_I2C_SLAVE_TESTUNIT is not set
|
||||
CONFIG_I2C_SYNQUACER=y
|
||||
CONFIG_I2C_THUNDERX=y
|
||||
# CONFIG_I2C_XLP9XX is not set
|
||||
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
|
||||
# CONFIG_IMX2_WDT is not set
|
||||
# CONFIG_IMX8MM_THERMAL is not set
|
||||
# CONFIG_IMX8QXP_ADC is not set
|
||||
# CONFIG_IMX93_ADC is not set
|
||||
# CONFIG_IMX_DMA is not set
|
||||
# CONFIG_IMX_DSP is not set
|
||||
CONFIG_IMX_INTMUX=y
|
||||
CONFIG_IMX_IRQSTEER=y
|
||||
CONFIG_IMX_MBOX=y
|
||||
# CONFIG_IMX_MU_MSI is not set
|
||||
CONFIG_IMX_SCU=y
|
||||
CONFIG_IMX_SCU_PD=y
|
||||
# CONFIG_IMX_SC_THERMAL is not set
|
||||
# CONFIG_IMX_SC_WDT is not set
|
||||
# CONFIG_IMX_SDMA is not set
|
||||
# CONFIG_IMX_WEIM is not set
|
||||
# CONFIG_INPUT_BBNSM_PWRKEY is not set
|
||||
# CONFIG_INPUT_HISI_POWERKEY is not set
|
||||
# CONFIG_INPUT_IBM_PANEL is not set
|
||||
# CONFIG_INTEL_STRATIX10_RSU is not set
|
||||
# CONFIG_INTEL_STRATIX10_SERVICE is not set
|
||||
CONFIG_INTERCONNECT=y
|
||||
CONFIG_INTERCONNECT_IMX=y
|
||||
CONFIG_INTERCONNECT_IMX8MM=y
|
||||
CONFIG_INTERCONNECT_IMX8MN=y
|
||||
CONFIG_INTERCONNECT_IMX8MP=y
|
||||
CONFIG_INTERCONNECT_IMX8MQ=y
|
||||
# CONFIG_IOMMUFD is not set
|
||||
# CONFIG_IOMMU_DEBUGFS is not set
|
||||
# CONFIG_IOMMU_DEFAULT_DMA_LAZY is not set
|
||||
CONFIG_IOMMU_DEFAULT_DMA_STRICT=y
|
||||
CONFIG_IOMMU_DEFAULT_PASSTHROUGH=y
|
||||
# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
|
||||
# CONFIG_IOMMU_IO_PGTABLE_DART is not set
|
||||
# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set
|
||||
CONFIG_IOMMU_SUPPORT=y
|
||||
# CONFIG_IPMMU_VMSA is not set
|
||||
# CONFIG_K3_DMA is not set
|
||||
CONFIG_KCMP=y
|
||||
CONFIG_KEYBOARD_ATKBD=y
|
||||
# CONFIG_KEYBOARD_IMX_SC_KEY is not set
|
||||
# CONFIG_KEYBOARD_SUN4I_LRADC is not set
|
||||
CONFIG_KSM=y
|
||||
# CONFIG_KUNPENG_HCCS is not set
|
||||
CONFIG_KVM=y
|
||||
CONFIG_LCD_CLASS_DEVICE=m
|
||||
# CONFIG_LCD_PLATFORM is not set
|
||||
# CONFIG_MAILBOX_TEST is not set
|
||||
CONFIG_MARVELL_10G_PHY=y
|
||||
# CONFIG_MARVELL_CN10K_DDR_PMU is not set
|
||||
# CONFIG_MARVELL_CN10K_TAD_PMU is not set
|
||||
# CONFIG_MARVELL_GTI_WDT is not set
|
||||
CONFIG_MDIO_BCM_IPROC=y
|
||||
CONFIG_MDIO_BUS_MUX_BCM_IPROC=y
|
||||
CONFIG_MDIO_SUN4I=y
|
||||
# CONFIG_MFD_ALTERA_A10SR is not set
|
||||
CONFIG_MFD_ALTERA_SYSMGR=y
|
||||
# CONFIG_MFD_AXP20X_RSB is not set
|
||||
CONFIG_MFD_CORE=y
|
||||
CONFIG_MFD_HI655X_PMIC=y
|
||||
# CONFIG_MFD_KHADAS_MCU is not set
|
||||
CONFIG_MFD_SUN4I_GPADC=y
|
||||
# CONFIG_MFD_SUN6I_PRCM is not set
|
||||
CONFIG_MFD_SYSCON=y
|
||||
CONFIG_MFD_VEXPRESS_SYSREG=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_ARMMMCI=y
|
||||
CONFIG_MMC_BCM2835=y
|
||||
CONFIG_MMC_BLOCK=y
|
||||
CONFIG_MMC_CAVIUM_THUNDERX=y
|
||||
CONFIG_MMC_DW=y
|
||||
# CONFIG_MMC_DW_BLUEFIELD is not set
|
||||
# CONFIG_MMC_DW_EXYNOS is not set
|
||||
# CONFIG_MMC_DW_HI3798CV200 is not set
|
||||
# CONFIG_MMC_DW_K3 is not set
|
||||
# CONFIG_MMC_DW_PCI is not set
|
||||
CONFIG_MMC_DW_PLTFM=y
|
||||
CONFIG_MMC_DW_ROCKCHIP=y
|
||||
# CONFIG_MMC_MXC is not set
|
||||
CONFIG_MMC_RICOH_MMC=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_ACPI=y
|
||||
CONFIG_MMC_SDHCI_CADENCE=y
|
||||
CONFIG_MMC_SDHCI_ESDHC_IMX=y
|
||||
CONFIG_MMC_SDHCI_IPROC=y
|
||||
CONFIG_MMC_SDHCI_OF_ESDHC=y
|
||||
CONFIG_MMC_SDHCI_PCI=y
|
||||
CONFIG_MMC_SDHCI_PLTFM=y
|
||||
CONFIG_MMC_SDHI=y
|
||||
CONFIG_MMC_SDHI_INTERNAL_DMAC=y
|
||||
# CONFIG_MMC_SDHI_SYS_DMAC is not set
|
||||
# CONFIG_MMC_SH_MMCIF is not set
|
||||
CONFIG_MMC_SUNXI=y
|
||||
CONFIG_MODULES_USE_ELF_RELA=y
|
||||
# CONFIG_MVNETA is not set
|
||||
# CONFIG_MVPP2 is not set
|
||||
# CONFIG_MV_XOR is not set
|
||||
# CONFIG_MX3_IPU is not set
|
||||
CONFIG_MXC_CLK=y
|
||||
CONFIG_MXC_CLK_SCU=y
|
||||
# CONFIG_MXS_DMA is not set
|
||||
CONFIG_NEED_SG_DMA_LENGTH=y
|
||||
# CONFIG_NET_VENDOR_ALLWINNER is not set
|
||||
CONFIG_NODES_SHIFT=4
|
||||
CONFIG_NOP_USB_XCEIV=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_NO_HZ_COMMON=y
|
||||
CONFIG_NO_HZ_IDLE=y
|
||||
CONFIG_NR_CPUS=256
|
||||
CONFIG_NUMA=y
|
||||
CONFIG_NUMA_BALANCING=y
|
||||
CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y
|
||||
# CONFIG_NVHE_EL2_DEBUG is not set
|
||||
CONFIG_NVIDIA_CARMEL_CNP_ERRATUM=y
|
||||
# CONFIG_NVMEM_IMX_IIM is not set
|
||||
# CONFIG_NVMEM_IMX_OCOTP_ELE is not set
|
||||
CONFIG_NVMEM_IMX_OCOTP_SCU=y
|
||||
# CONFIG_NVMEM_LAYERSCAPE_SFP is not set
|
||||
CONFIG_NVMEM_ROCKCHIP_EFUSE=y
|
||||
# CONFIG_NVMEM_ROCKCHIP_OTP is not set
|
||||
# CONFIG_NVMEM_SNVS_LPGPR is not set
|
||||
# CONFIG_NVMEM_SUNXI_SID is not set
|
||||
# CONFIG_NVMEM_ZYNQMP is not set
|
||||
CONFIG_PCC=y
|
||||
CONFIG_PCIEAER=y
|
||||
CONFIG_PCIEASPM=y
|
||||
CONFIG_PCIEASPM_DEFAULT=y
|
||||
# CONFIG_PCIEASPM_PERFORMANCE is not set
|
||||
# CONFIG_PCIEASPM_POWERSAVE is not set
|
||||
# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
|
||||
CONFIG_PCIEPORTBUS=y
|
||||
CONFIG_PCIE_ARMADA_8K=y
|
||||
CONFIG_PCIE_BRCMSTB=y
|
||||
CONFIG_PCIE_HISI_STB=y
|
||||
CONFIG_PCIE_IPROC_MSI=y
|
||||
CONFIG_PCIE_IPROC_PLATFORM=y
|
||||
CONFIG_PCIE_LAYERSCAPE=y
|
||||
CONFIG_PCIE_MOBIVEIL_PLAT=y
|
||||
# CONFIG_PCIE_RCAR_EP is not set
|
||||
CONFIG_PCIE_RCAR_HOST=y
|
||||
CONFIG_PCIE_ROCKCHIP=y
|
||||
# CONFIG_PCIE_ROCKCHIP_DW_HOST is not set
|
||||
CONFIG_PCIE_ROCKCHIP_HOST=y
|
||||
CONFIG_PCIE_XILINX_CPM=y
|
||||
CONFIG_PCIE_XILINX_NWL=y
|
||||
CONFIG_PCI_AARDVARK=y
|
||||
CONFIG_PCI_HISI=y
|
||||
CONFIG_PCI_HOST_THUNDER_ECAM=y
|
||||
CONFIG_PCI_HOST_THUNDER_PEM=y
|
||||
CONFIG_PCI_HYPERV=y
|
||||
CONFIG_PCI_IMX6=y
|
||||
CONFIG_PCI_IMX6_HOST=y
|
||||
CONFIG_PCI_IOV=y
|
||||
CONFIG_PCI_LAYERSCAPE=y
|
||||
CONFIG_PCI_PASID=y
|
||||
# CONFIG_PCI_RCAR_GEN2 is not set
|
||||
CONFIG_PHY_BCM_SR_PCIE=y
|
||||
CONFIG_PHY_BCM_SR_USB=y
|
||||
CONFIG_PHY_BRCM_SATA=y
|
||||
CONFIG_PHY_BRCM_USB=y
|
||||
CONFIG_PHY_FSL_IMX8MQ_USB=y
|
||||
CONFIG_PHY_FSL_IMX8M_PCIE=y
|
||||
# CONFIG_PHY_FSL_LYNX_28G is not set
|
||||
CONFIG_PHY_HI3660_USB=y
|
||||
CONFIG_PHY_HI3670_PCIE=y
|
||||
CONFIG_PHY_HI3670_USB=y
|
||||
CONFIG_PHY_HI6220_USB=y
|
||||
CONFIG_PHY_HISI_INNO_USB2=y
|
||||
# CONFIG_PHY_HISTB_COMBPHY is not set
|
||||
# CONFIG_PHY_MIXEL_LVDS_PHY is not set
|
||||
CONFIG_PHY_MVEBU_A3700_COMPHY=y
|
||||
CONFIG_PHY_MVEBU_A3700_UTMI=y
|
||||
CONFIG_PHY_MVEBU_A38X_COMPHY=y
|
||||
CONFIG_PHY_MVEBU_CP110_COMPHY=y
|
||||
CONFIG_PHY_NS2_PCIE=y
|
||||
CONFIG_PHY_NS2_USB_DRD=y
|
||||
# CONFIG_PHY_R8A779F0_ETHERNET_SERDES is not set
|
||||
# CONFIG_PHY_RCAR_GEN2 is not set
|
||||
CONFIG_PHY_RCAR_GEN3_PCIE=y
|
||||
CONFIG_PHY_RCAR_GEN3_USB2=y
|
||||
CONFIG_PHY_RCAR_GEN3_USB3=y
|
||||
# CONFIG_PHY_ROCKCHIP_DP is not set
|
||||
# CONFIG_PHY_ROCKCHIP_DPHY_RX0 is not set
|
||||
CONFIG_PHY_ROCKCHIP_EMMC=y
|
||||
# CONFIG_PHY_ROCKCHIP_INNO_CSIDPHY is not set
|
||||
# CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY is not set
|
||||
# CONFIG_PHY_ROCKCHIP_INNO_HDMI is not set
|
||||
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
|
||||
# CONFIG_PHY_ROCKCHIP_NANENG_COMBO_PHY is not set
|
||||
CONFIG_PHY_ROCKCHIP_PCIE=y
|
||||
CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y
|
||||
CONFIG_PHY_ROCKCHIP_TYPEC=y
|
||||
# CONFIG_PHY_ROCKCHIP_USB is not set
|
||||
CONFIG_PHY_SUN4I_USB=y
|
||||
CONFIG_PHY_SUN50I_USB3=y
|
||||
# CONFIG_PHY_SUN6I_MIPI_DPHY is not set
|
||||
CONFIG_PHY_SUN9I_USB=y
|
||||
# CONFIG_PHY_XILINX_ZYNQMP is not set
|
||||
CONFIG_PINCTRL_IMX=y
|
||||
CONFIG_PINCTRL_IMX8DXL=y
|
||||
CONFIG_PINCTRL_IMX8MM=y
|
||||
CONFIG_PINCTRL_IMX8MN=y
|
||||
CONFIG_PINCTRL_IMX8MP=y
|
||||
CONFIG_PINCTRL_IMX8MQ=y
|
||||
CONFIG_PINCTRL_IMX8QM=y
|
||||
CONFIG_PINCTRL_IMX8QXP=y
|
||||
CONFIG_PINCTRL_IMX8ULP=y
|
||||
CONFIG_PINCTRL_IMX93=y
|
||||
# CONFIG_PINCTRL_IMXRT1050 is not set
|
||||
# CONFIG_PINCTRL_IMXRT1170 is not set
|
||||
CONFIG_PINCTRL_IMX_SCU=y
|
||||
CONFIG_PINCTRL_IPROC_GPIO=y
|
||||
CONFIG_PINCTRL_NS2_MUX=y
|
||||
CONFIG_PINCTRL_ROCKCHIP=y
|
||||
# CONFIG_PINCTRL_SUN20I_D1 is not set
|
||||
CONFIG_PINCTRL_SUN4I_A10=y
|
||||
CONFIG_PINCTRL_SUN50I_A100=y
|
||||
CONFIG_PINCTRL_SUN50I_A100_R=y
|
||||
CONFIG_PINCTRL_SUN50I_A64=y
|
||||
CONFIG_PINCTRL_SUN50I_A64_R=y
|
||||
CONFIG_PINCTRL_SUN50I_H5=y
|
||||
CONFIG_PINCTRL_SUN50I_H6=y
|
||||
CONFIG_PINCTRL_SUN50I_H616=y
|
||||
CONFIG_PINCTRL_SUN50I_H616_R=y
|
||||
CONFIG_PINCTRL_SUN50I_H6_R=y
|
||||
CONFIG_PINCTRL_SUN5I=y
|
||||
# CONFIG_PINCTRL_SUN6I_A31 is not set
|
||||
# CONFIG_PINCTRL_SUN6I_A31_R is not set
|
||||
# CONFIG_PINCTRL_SUN8I_A23 is not set
|
||||
# CONFIG_PINCTRL_SUN8I_A23_R is not set
|
||||
# CONFIG_PINCTRL_SUN8I_A33 is not set
|
||||
# CONFIG_PINCTRL_SUN8I_A83T is not set
|
||||
# CONFIG_PINCTRL_SUN8I_A83T_R is not set
|
||||
# CONFIG_PINCTRL_SUN8I_H3 is not set
|
||||
# CONFIG_PINCTRL_SUN8I_H3_R is not set
|
||||
# CONFIG_PINCTRL_SUN8I_V3S is not set
|
||||
# CONFIG_PINCTRL_SUN9I_A80 is not set
|
||||
# CONFIG_PINCTRL_SUN9I_A80_R is not set
|
||||
CONFIG_PINCTRL_ZYNQMP=y
|
||||
CONFIG_PM=y
|
||||
CONFIG_PM_CLK=y
|
||||
CONFIG_PM_GENERIC_DOMAINS=y
|
||||
CONFIG_PM_GENERIC_DOMAINS_OF=y
|
||||
CONFIG_POWER_RESET=y
|
||||
CONFIG_POWER_RESET_HISI=y
|
||||
CONFIG_POWER_RESET_VEXPRESS=y
|
||||
CONFIG_POWER_SUPPLY=y
|
||||
# CONFIG_PTP_1588_CLOCK_DTE is not set
|
||||
# CONFIG_PWM_BCM2835 is not set
|
||||
CONFIG_QCOM_FALKOR_ERRATUM_1003=y
|
||||
CONFIG_QCOM_FALKOR_ERRATUM_1009=y
|
||||
CONFIG_QCOM_FALKOR_ERRATUM_E1041=y
|
||||
CONFIG_QCOM_QDF2400_ERRATUM_0065=y
|
||||
CONFIG_QORIQ_THERMAL=y
|
||||
CONFIG_QUEUED_RWLOCKS=y
|
||||
CONFIG_QUEUED_SPINLOCKS=y
|
||||
CONFIG_RANDOMIZE_BASE=y
|
||||
CONFIG_RANDOMIZE_MODULE_REGION_FULL=y
|
||||
CONFIG_RANDSTRUCT_NONE=y
|
||||
CONFIG_RASPBERRYPI_FIRMWARE=y
|
||||
CONFIG_RASPBERRYPI_POWER=y
|
||||
# CONFIG_RAVB is not set
|
||||
CONFIG_RCAR_DMAC=y
|
||||
# CONFIG_RCAR_GEN3_THERMAL is not set
|
||||
# CONFIG_RCAR_THERMAL is not set
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_REGMAP_MMIO=y
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_ANATOP=y
|
||||
CONFIG_REGULATOR_AXP20X=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
CONFIG_REGULATOR_HI655X=y
|
||||
CONFIG_REGULATOR_PFUZE100=y
|
||||
# CONFIG_REGULATOR_VEXPRESS is not set
|
||||
CONFIG_RELOCATABLE=y
|
||||
# CONFIG_RENESAS_ETHER_SWITCH is not set
|
||||
CONFIG_RENESAS_OSTM=y
|
||||
# CONFIG_RENESAS_RZAWDT is not set
|
||||
# CONFIG_RENESAS_RZG2LWDT is not set
|
||||
# CONFIG_RENESAS_RZN1WDT is not set
|
||||
CONFIG_RENESAS_USB_DMAC=y
|
||||
# CONFIG_RENESAS_WDT is not set
|
||||
# CONFIG_RESET_BRCMSTB is not set
|
||||
CONFIG_RESET_IMX7=y
|
||||
# CONFIG_RESET_RASPBERRYPI is not set
|
||||
CONFIG_RESET_RZG2L_USBPHY_CTRL=y
|
||||
CONFIG_ROCKCHIP_IODOMAIN=y
|
||||
CONFIG_ROCKCHIP_IOMMU=y
|
||||
# CONFIG_ROCKCHIP_MBOX is not set
|
||||
CONFIG_ROCKCHIP_PM_DOMAINS=y
|
||||
# CONFIG_ROCKCHIP_SARADC is not set
|
||||
# CONFIG_ROCKCHIP_THERMAL is not set
|
||||
CONFIG_RODATA_FULL_DEFAULT_ENABLED=y
|
||||
# CONFIG_RTC_DRV_BBNSM is not set
|
||||
# CONFIG_RTC_DRV_BRCMSTB is not set
|
||||
# CONFIG_RTC_DRV_FSL_FTM_ALARM is not set
|
||||
# CONFIG_RTC_DRV_IMXDI is not set
|
||||
# CONFIG_RTC_DRV_IMX_SC is not set
|
||||
CONFIG_RTC_DRV_MV=y
|
||||
# CONFIG_RTC_DRV_MXC is not set
|
||||
# CONFIG_RTC_DRV_MXC_V2 is not set
|
||||
# CONFIG_RTC_DRV_SH is not set
|
||||
CONFIG_RTC_I2C_AND_SPI=y
|
||||
# CONFIG_RZG2L_ADC is not set
|
||||
# CONFIG_RZG2L_THERMAL is not set
|
||||
CONFIG_RZ_DMAC=y
|
||||
CONFIG_RZ_MTU3=y
|
||||
CONFIG_SATA_SIL24=y
|
||||
# CONFIG_SCHED_CORE is not set
|
||||
CONFIG_SCHED_MC=y
|
||||
CONFIG_SCHED_SMT=y
|
||||
# CONFIG_SENSORS_ARM_SCPI is not set
|
||||
CONFIG_SERIAL_8250_BCM2835AUX=y
|
||||
CONFIG_SERIAL_8250_BCM7271=y
|
||||
# CONFIG_SERIAL_8250_EXAR is not set
|
||||
CONFIG_SERIAL_8250_FSL=y
|
||||
CONFIG_SERIAL_8250_PCI=y
|
||||
CONFIG_SERIAL_FSL_LINFLEXUART=y
|
||||
CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE=y
|
||||
CONFIG_SERIAL_FSL_LPUART=y
|
||||
CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
|
||||
CONFIG_SERIAL_IMX=y
|
||||
CONFIG_SERIAL_IMX_CONSOLE=y
|
||||
CONFIG_SERIAL_IMX_EARLYCON=y
|
||||
CONFIG_SERIAL_MVEBU_CONSOLE=y
|
||||
CONFIG_SERIAL_MVEBU_UART=y
|
||||
CONFIG_SERIAL_SAMSUNG=y
|
||||
CONFIG_SERIAL_SAMSUNG_CONSOLE=y
|
||||
CONFIG_SERIAL_SH_SCI=y
|
||||
CONFIG_SERIAL_SH_SCI_CONSOLE=y
|
||||
CONFIG_SERIAL_SH_SCI_DMA=y
|
||||
CONFIG_SERIAL_SH_SCI_EARLYCON=y
|
||||
CONFIG_SERIAL_SH_SCI_NR_UARTS=18
|
||||
CONFIG_SERIO=y
|
||||
# CONFIG_SMC91X is not set
|
||||
# CONFIG_SND_SOC_RCAR is not set
|
||||
# CONFIG_SND_SOC_RZ is not set
|
||||
# CONFIG_SND_SOC_SH4_FSI is not set
|
||||
# CONFIG_SND_SUN4I_I2S is not set
|
||||
# CONFIG_SND_SUN50I_CODEC_ANALOG is not set
|
||||
# CONFIG_SND_SUN50I_DMIC is not set
|
||||
# CONFIG_SND_SUN8I_CODEC is not set
|
||||
# CONFIG_SND_SUN8I_CODEC_ANALOG is not set
|
||||
# CONFIG_SNI_NETSEC is not set
|
||||
CONFIG_SOCIONEXT_SYNQUACER_PREITS=y
|
||||
CONFIG_SOC_IMX8M=y
|
||||
CONFIG_SOC_IMX9=y
|
||||
CONFIG_SPARSEMEM=y
|
||||
CONFIG_SPARSEMEM_EXTREME=y
|
||||
CONFIG_SPARSEMEM_VMEMMAP=y
|
||||
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
|
||||
CONFIG_SPI_ARMADA_3700=y
|
||||
# CONFIG_SPI_BCM2835 is not set
|
||||
CONFIG_SPI_FSL_LPSPI=y
|
||||
# CONFIG_SPI_FSL_QUADSPI is not set
|
||||
# CONFIG_SPI_HISI_KUNPENG is not set
|
||||
# CONFIG_SPI_HISI_SFC is not set
|
||||
# CONFIG_SPI_HISI_SFC_V3XX is not set
|
||||
CONFIG_SPI_IMX=y
|
||||
# CONFIG_SPI_ROCKCHIP_SFC is not set
|
||||
# CONFIG_SPI_RSPI is not set
|
||||
# CONFIG_SPI_RZV2M_CSI is not set
|
||||
# CONFIG_SPI_SH_HSPI is not set
|
||||
# CONFIG_SPI_SH_MSIOF is not set
|
||||
# CONFIG_SPI_SUN4I is not set
|
||||
# CONFIG_SPI_SUN6I is not set
|
||||
# CONFIG_SPI_SYNQUACER is not set
|
||||
CONFIG_SPI_THUNDERX=y
|
||||
# CONFIG_SPI_XLP is not set
|
||||
# CONFIG_SSIF_IPMI_BMC is not set
|
||||
CONFIG_STUB_CLK_HI3660=y
|
||||
CONFIG_STUB_CLK_HI6220=y
|
||||
# CONFIG_SUN20I_GPADC is not set
|
||||
# CONFIG_SUN20I_PPU is not set
|
||||
CONFIG_SUN50I_A100_CCU=y
|
||||
CONFIG_SUN50I_A100_R_CCU=y
|
||||
CONFIG_SUN50I_A64_CCU=y
|
||||
CONFIG_SUN50I_H616_CCU=y
|
||||
CONFIG_SUN50I_H6_CCU=y
|
||||
CONFIG_SUN50I_H6_R_CCU=y
|
||||
CONFIG_SUN50I_IOMMU=y
|
||||
CONFIG_SUN6I_MSGBOX=y
|
||||
CONFIG_SUN6I_RTC_CCU=y
|
||||
# CONFIG_SUN8I_A83T_CCU is not set
|
||||
CONFIG_SUN8I_DE2_CCU=y
|
||||
# CONFIG_SUN8I_H3_CCU is not set
|
||||
CONFIG_SUN8I_R_CCU=y
|
||||
CONFIG_SUN8I_THERMAL=y
|
||||
CONFIG_SUNXI_CCU=y
|
||||
CONFIG_SUNXI_RSB=y
|
||||
CONFIG_SUNXI_WATCHDOG=y
|
||||
CONFIG_SYNC_FILE=y
|
||||
CONFIG_SYSCTL_EXCEPTION_TRACE=y
|
||||
# CONFIG_TCG_TIS_SYNQUACER is not set
|
||||
CONFIG_THREAD_INFO_IN_TASK=y
|
||||
# CONFIG_THUNDERX2_PMU is not set
|
||||
CONFIG_TRANSPARENT_HUGEPAGE=y
|
||||
CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y
|
||||
# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set
|
||||
# CONFIG_TURRIS_MOX_RWTM is not set
|
||||
CONFIG_TYPEC=y
|
||||
# CONFIG_TYPEC_ANX7411 is not set
|
||||
# CONFIG_TYPEC_DP_ALTMODE is not set
|
||||
# CONFIG_TYPEC_FUSB302 is not set
|
||||
# CONFIG_TYPEC_HD3SS3220 is not set
|
||||
# CONFIG_TYPEC_MUX_FSA4480 is not set
|
||||
# CONFIG_TYPEC_MUX_GPIO_SBU is not set
|
||||
# CONFIG_TYPEC_MUX_NB7VPQ904M is not set
|
||||
# CONFIG_TYPEC_MUX_PI3USB30532 is not set
|
||||
# CONFIG_TYPEC_RT1711H is not set
|
||||
# CONFIG_TYPEC_RT1719 is not set
|
||||
# CONFIG_TYPEC_STUSB160X is not set
|
||||
CONFIG_TYPEC_TCPCI=y
|
||||
# CONFIG_TYPEC_TCPCI_MAXIM is not set
|
||||
CONFIG_TYPEC_TCPM=y
|
||||
# CONFIG_TYPEC_TPS6598X is not set
|
||||
# CONFIG_TYPEC_WUSB3801 is not set
|
||||
# CONFIG_UACCE is not set
|
||||
CONFIG_UNMAP_KERNEL_AT_EL0=y
|
||||
# CONFIG_USB_BRCMSTB is not set
|
||||
# CONFIG_USB_CDNS2_UDC is not set
|
||||
CONFIG_USB_CHIPIDEA=y
|
||||
CONFIG_USB_CHIPIDEA_GENERIC=y
|
||||
CONFIG_USB_CHIPIDEA_HOST=y
|
||||
CONFIG_USB_CHIPIDEA_IMX=y
|
||||
CONFIG_USB_CHIPIDEA_PCI=y
|
||||
CONFIG_USB_CHIPIDEA_UDC=y
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_USB_DWC3_DUAL_ROLE=y
|
||||
# CONFIG_USB_DWC3_GADGET is not set
|
||||
CONFIG_USB_DWC3_HAPS=y
|
||||
# CONFIG_USB_DWC3_HOST is not set
|
||||
CONFIG_USB_DWC3_IMX8MP=y
|
||||
# CONFIG_USB_DWC3_OF_SIMPLE is not set
|
||||
CONFIG_USB_DWC3_PCI=y
|
||||
# CONFIG_USB_DWC3_ULPI is not set
|
||||
CONFIG_USB_DWC3_XILINX=y
|
||||
CONFIG_USB_EHCI_FSL=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_EHCI_HCD_ORION=y
|
||||
CONFIG_USB_EHCI_HCD_PLATFORM=y
|
||||
# CONFIG_USB_EMXX is not set
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_MXS_PHY=y
|
||||
CONFIG_USB_OHCI_EXYNOS=y
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
CONFIG_USB_OHCI_HCD_PCI=y
|
||||
CONFIG_USB_OHCI_HCD_PLATFORM=y
|
||||
CONFIG_USB_OTG=y
|
||||
CONFIG_USB_OTG_FSM=y
|
||||
CONFIG_USB_RENESAS_USB3=y
|
||||
CONFIG_USB_RENESAS_USBF=y
|
||||
CONFIG_USB_RENESAS_USBHS=y
|
||||
CONFIG_USB_RENESAS_USBHS_HCD=y
|
||||
CONFIG_USB_RENESAS_USBHS_UDC=y
|
||||
CONFIG_USB_RZV2M_USB3DRD=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_HISTB=y
|
||||
CONFIG_USB_XHCI_MVEBU=y
|
||||
CONFIG_USB_XHCI_PLATFORM=y
|
||||
# CONFIG_USB_XHCI_RCAR is not set
|
||||
CONFIG_USB_XHCI_RZV2M=y
|
||||
CONFIG_VEXPRESS_CONFIG=y
|
||||
# CONFIG_VFIO_AMBA is not set
|
||||
CONFIG_VIDEOMODE_HELPERS=y
|
||||
# CONFIG_VIDEO_IMX7_CSI is not set
|
||||
# CONFIG_VIDEO_IMX8MQ_MIPI_CSI2 is not set
|
||||
# CONFIG_VIDEO_IMX8_ISI is not set
|
||||
# CONFIG_VIDEO_RZG2L_CRU is not set
|
||||
# CONFIG_VIDEO_RZG2L_CSI2 is not set
|
||||
CONFIG_VIRTIO_DMA_SHARED_BUFFER=y
|
||||
# CONFIG_VIRTIO_IOMMU is not set
|
||||
CONFIG_VIRTUALIZATION=y
|
||||
CONFIG_VMAP_STACK=y
|
||||
CONFIG_WDAT_WDT=y
|
||||
# CONFIG_XILINX_AMS is not set
|
||||
# CONFIG_XILINX_INTC is not set
|
||||
CONFIG_XLNX_EVENT_MANAGER=y
|
||||
CONFIG_ZONE_DMA32=y
|
||||
CONFIG_ZYNQMP_FIRMWARE=y
|
||||
# CONFIG_ZYNQMP_FIRMWARE_DEBUG is not set
|
||||
CONFIG_ZYNQMP_PM_DOMAINS=y
|
||||
CONFIG_ZYNQMP_POWER=y
|
||||
|
|
@ -1,342 +0,0 @@
|
|||
CONFIG_64BIT=y
|
||||
CONFIG_9P_FS=y
|
||||
# CONFIG_9P_FS_POSIX_ACL is not set
|
||||
# CONFIG_9P_FS_SECURITY is not set
|
||||
# CONFIG_A64FX_DIAG is not set
|
||||
CONFIG_ACPI=y
|
||||
CONFIG_ACPI_AC=y
|
||||
CONFIG_ACPI_APEI=y
|
||||
CONFIG_ACPI_APEI_EINJ=y
|
||||
# CONFIG_ACPI_APEI_ERST_DEBUG is not set
|
||||
CONFIG_ACPI_APEI_GHES=y
|
||||
CONFIG_ACPI_APEI_MEMORY_FAILURE=y
|
||||
CONFIG_ACPI_APEI_PCIEAER=y
|
||||
CONFIG_ACPI_BATTERY=y
|
||||
# CONFIG_ACPI_BGRT is not set
|
||||
CONFIG_ACPI_BUTTON=y
|
||||
CONFIG_ACPI_CCA_REQUIRED=y
|
||||
CONFIG_ACPI_CONTAINER=y
|
||||
CONFIG_ACPI_CPPC_CPUFREQ=y
|
||||
# CONFIG_ACPI_DEBUG is not set
|
||||
# CONFIG_ACPI_DEBUGGER is not set
|
||||
# CONFIG_ACPI_DOCK is not set
|
||||
# CONFIG_ACPI_EC_DEBUGFS is not set
|
||||
CONFIG_ACPI_FAN=y
|
||||
CONFIG_ACPI_GENERIC_GSI=y
|
||||
CONFIG_ACPI_GTDT=y
|
||||
CONFIG_ACPI_HOTPLUG_CPU=y
|
||||
CONFIG_ACPI_I2C_OPREGION=y
|
||||
CONFIG_ACPI_IORT=y
|
||||
CONFIG_ACPI_MCFG=y
|
||||
# CONFIG_ACPI_PCI_SLOT is not set
|
||||
# CONFIG_ACPI_PFRUT is not set
|
||||
CONFIG_ACPI_PPTT=y
|
||||
CONFIG_ACPI_PRMT=y
|
||||
CONFIG_ACPI_PROCESSOR=y
|
||||
CONFIG_ACPI_PROCESSOR_IDLE=y
|
||||
CONFIG_ACPI_REDUCED_HARDWARE_ONLY=y
|
||||
CONFIG_ACPI_SPCR_TABLE=y
|
||||
CONFIG_ACPI_THERMAL=y
|
||||
# CONFIG_ACPI_TINY_POWER_BUTTON is not set
|
||||
# CONFIG_ALIBABA_UNCORE_DRW_PMU is not set
|
||||
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
|
||||
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
|
||||
CONFIG_ARCH_KEEP_MEMBLOCK=y
|
||||
CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y
|
||||
CONFIG_ARCH_MMAP_RND_BITS=18
|
||||
CONFIG_ARCH_MMAP_RND_BITS_MAX=24
|
||||
CONFIG_ARCH_MMAP_RND_BITS_MIN=18
|
||||
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
|
||||
CONFIG_ARCH_PROC_KCORE_TEXT=y
|
||||
CONFIG_ARCH_SPARSEMEM_ENABLE=y
|
||||
CONFIG_ARCH_STACKWALK=y
|
||||
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
||||
CONFIG_ARCH_WANTS_NO_INSTR=y
|
||||
CONFIG_ARM64=y
|
||||
CONFIG_ARM64_4K_PAGES=y
|
||||
# CONFIG_ARM64_ACPI_PARKING_PROTOCOL is not set
|
||||
CONFIG_ARM64_ERRATUM_3194386=y
|
||||
CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y
|
||||
CONFIG_ARM64_PAGE_SHIFT=12
|
||||
CONFIG_ARM64_PA_BITS=48
|
||||
CONFIG_ARM64_PA_BITS_48=y
|
||||
CONFIG_ARM64_TAGGED_ADDR_ABI=y
|
||||
CONFIG_ARM64_VA_BITS=39
|
||||
CONFIG_ARM64_VA_BITS_39=y
|
||||
CONFIG_ARM_AMBA=y
|
||||
CONFIG_ARM_ARCH_TIMER=y
|
||||
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
|
||||
CONFIG_ARM_GIC=y
|
||||
CONFIG_ARM_GIC_V2M=y
|
||||
CONFIG_ARM_GIC_V3=y
|
||||
CONFIG_ARM_GIC_V3_ITS=y
|
||||
CONFIG_ARM_GIC_V3_ITS_PCI=y
|
||||
CONFIG_ARM_PSCI_FW=y
|
||||
# CONFIG_ARM_SMMU_V3_PMU is not set
|
||||
CONFIG_ATA=y
|
||||
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
|
||||
CONFIG_BALLOON_COMPACTION=y
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_BLK_DEV_NVME=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_BLK_MQ_PCI=y
|
||||
CONFIG_BLK_MQ_VIRTIO=y
|
||||
CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y
|
||||
CONFIG_CLONE_BACKWARDS=y
|
||||
CONFIG_COMMON_CLK=y
|
||||
# CONFIG_COMPAT_32BIT_TIME is not set
|
||||
CONFIG_CONSOLE_TRANSLATIONS=y
|
||||
CONFIG_CPU_IDLE=y
|
||||
CONFIG_CPU_IDLE_GOV_LADDER=y
|
||||
CONFIG_CPU_PM=y
|
||||
CONFIG_CPU_RMAP=y
|
||||
CONFIG_CRC16=y
|
||||
CONFIG_CRYPTO_CRC32=y
|
||||
CONFIG_CRYPTO_CRC32C=y
|
||||
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
|
||||
CONFIG_CRYPTO_RNG2=y
|
||||
CONFIG_DCACHE_WORD_ACCESS=y
|
||||
CONFIG_DEBUG_BUGVERBOSE=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_DMA_ACPI=y
|
||||
CONFIG_DMA_DIRECT_REMAP=y
|
||||
CONFIG_DMA_ENGINE=y
|
||||
CONFIG_DMA_OF=y
|
||||
CONFIG_DMA_REMAP=y
|
||||
CONFIG_DMI=y
|
||||
CONFIG_DMIID=y
|
||||
CONFIG_DMI_SYSFS=y
|
||||
CONFIG_DRM_FBDEV_EMULATION=y
|
||||
CONFIG_DRM_FBDEV_OVERALLOC=100
|
||||
CONFIG_DRM_LOAD_EDID_FIRMWARE=y
|
||||
CONFIG_DTC=y
|
||||
CONFIG_EDAC_SUPPORT=y
|
||||
CONFIG_EFI=y
|
||||
CONFIG_EFIVAR_FS=y
|
||||
CONFIG_EFI_ARMSTUB_DTB_LOADER=y
|
||||
# CONFIG_EFI_BOOTLOADER_CONTROL is not set
|
||||
# CONFIG_EFI_CAPSULE_LOADER is not set
|
||||
# CONFIG_EFI_COCO_SECRET is not set
|
||||
# CONFIG_EFI_CUSTOM_SSDT_OVERLAYS is not set
|
||||
# CONFIG_EFI_DISABLE_PCI_DMA is not set
|
||||
# CONFIG_EFI_DISABLE_RUNTIME is not set
|
||||
CONFIG_EFI_EARLYCON=y
|
||||
CONFIG_EFI_ESRT=y
|
||||
CONFIG_EFI_GENERIC_STUB=y
|
||||
# CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER is not set
|
||||
CONFIG_EFI_PARAMS_FROM_FDT=y
|
||||
CONFIG_EFI_RUNTIME_WRAPPERS=y
|
||||
CONFIG_EFI_STUB=y
|
||||
# CONFIG_EFI_TEST is not set
|
||||
# CONFIG_EFI_ZBOOT is not set
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_F2FS_FS=y
|
||||
CONFIG_FAILOVER=y
|
||||
CONFIG_FB_EFI=y
|
||||
CONFIG_FIX_EARLYCON_MEM=y
|
||||
CONFIG_FONT_8x16=y
|
||||
CONFIG_FONT_AUTOSELECT=y
|
||||
CONFIG_FONT_SUPPORT=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
|
||||
# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
|
||||
CONFIG_FRAME_POINTER=y
|
||||
CONFIG_FS_IOMAP=y
|
||||
CONFIG_FS_MBCACHE=y
|
||||
CONFIG_FW_LOADER_PAGED_BUF=y
|
||||
CONFIG_GENERIC_ALLOCATOR=y
|
||||
CONFIG_GENERIC_ARCH_TOPOLOGY=y
|
||||
CONFIG_GENERIC_BUG=y
|
||||
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
|
||||
CONFIG_GENERIC_CPU_AUTOPROBE=y
|
||||
CONFIG_GENERIC_CPU_VULNERABILITIES=y
|
||||
CONFIG_GENERIC_CSUM=y
|
||||
CONFIG_GENERIC_EARLY_IOREMAP=y
|
||||
CONFIG_GENERIC_FIND_FIRST_BIT=y
|
||||
CONFIG_GENERIC_GETTIMEOFDAY=y
|
||||
CONFIG_GENERIC_IDLE_POLL_SETUP=y
|
||||
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
|
||||
CONFIG_GENERIC_IRQ_MIGRATION=y
|
||||
CONFIG_GENERIC_IRQ_SHOW=y
|
||||
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
|
||||
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
|
||||
CONFIG_GENERIC_MSI_IRQ=y
|
||||
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
|
||||
CONFIG_GENERIC_PCI_IOMAP=y
|
||||
CONFIG_GENERIC_SCHED_CLOCK=y
|
||||
CONFIG_GENERIC_SMP_IDLE_THREAD=y
|
||||
CONFIG_GENERIC_STRNCPY_FROM_USER=y
|
||||
CONFIG_GENERIC_STRNLEN_USER=y
|
||||
CONFIG_GENERIC_TIME_VSYSCALL=y
|
||||
CONFIG_GPIOLIB_IRQCHIP=y
|
||||
CONFIG_GPIO_ACPI=y
|
||||
CONFIG_GPIO_CDEV=y
|
||||
# CONFIG_GPIO_HISI is not set
|
||||
CONFIG_GPIO_PL061=y
|
||||
# CONFIG_GPIO_VF610 is not set
|
||||
CONFIG_HANDLE_DOMAIN_IRQ=y
|
||||
CONFIG_HARDIRQS_SW_RESEND=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT_MAP=y
|
||||
CONFIG_HID=y
|
||||
CONFIG_HID_GENERIC=y
|
||||
CONFIG_HID_SUPPORT=y
|
||||
CONFIG_HOTPLUG_CPU=y
|
||||
CONFIG_HOTPLUG_PCI_ACPI=y
|
||||
CONFIG_HVC_DRIVER=y
|
||||
CONFIG_HZ_PERIODIC=y
|
||||
# CONFIG_I2C_AMD_MP2 is not set
|
||||
CONFIG_I2C_HID_ACPI=y
|
||||
# CONFIG_I2C_HISI is not set
|
||||
# CONFIG_I2C_SLAVE_TESTUNIT is not set
|
||||
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
|
||||
# CONFIG_IMA_SECURE_AND_OR_TRUSTED_BOOT is not set
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
CONFIG_INPUT_KEYBOARD=y
|
||||
CONFIG_IRQCHIP=y
|
||||
CONFIG_IRQ_DOMAIN=y
|
||||
CONFIG_IRQ_DOMAIN_HIERARCHY=y
|
||||
CONFIG_IRQ_FORCED_THREADING=y
|
||||
CONFIG_IRQ_WORK=y
|
||||
# CONFIG_ISCSI_IBFT is not set
|
||||
CONFIG_JBD2=y
|
||||
CONFIG_LIBFDT=y
|
||||
CONFIG_LOCK_DEBUGGING_SUPPORT=y
|
||||
CONFIG_LOCK_SPIN_ON_OWNER=y
|
||||
CONFIG_MEMFD_CREATE=y
|
||||
CONFIG_MEMORY_BALLOON=y
|
||||
CONFIG_MIGRATION=y
|
||||
# CONFIG_MLXBF_GIGE is not set
|
||||
CONFIG_MMC_SDHCI_ACPI=y
|
||||
CONFIG_MODULES_USE_ELF_RELA=y
|
||||
CONFIG_MUTEX_SPIN_ON_OWNER=y
|
||||
CONFIG_MVMDIO=y
|
||||
CONFIG_NEED_DMA_MAP_STATE=y
|
||||
CONFIG_NEED_SG_DMA_LENGTH=y
|
||||
CONFIG_NET_9P=y
|
||||
# CONFIG_NET_9P_DEBUG is not set
|
||||
# CONFIG_NET_9P_FD is not set
|
||||
CONFIG_NET_9P_VIRTIO=y
|
||||
CONFIG_NET_FAILOVER=y
|
||||
CONFIG_NET_FLOW_LIMIT=y
|
||||
CONFIG_NLS=y
|
||||
CONFIG_NR_CPUS=256
|
||||
CONFIG_NVMEM=y
|
||||
CONFIG_NVME_CORE=y
|
||||
# CONFIG_NVME_MULTIPATH is not set
|
||||
CONFIG_OF=y
|
||||
CONFIG_OF_ADDRESS=y
|
||||
CONFIG_OF_EARLY_FLATTREE=y
|
||||
CONFIG_OF_FLATTREE=y
|
||||
CONFIG_OF_GPIO=y
|
||||
CONFIG_OF_IRQ=y
|
||||
CONFIG_OF_KOBJ=y
|
||||
CONFIG_PADATA=y
|
||||
CONFIG_PAGE_REPORTING=y
|
||||
CONFIG_PARTITION_PERCPU=y
|
||||
CONFIG_PCI=y
|
||||
# CONFIG_PCIE_HISI_ERR is not set
|
||||
CONFIG_PCI_DOMAINS=y
|
||||
CONFIG_PCI_DOMAINS_GENERIC=y
|
||||
CONFIG_PCI_ECAM=y
|
||||
CONFIG_PCI_HOST_COMMON=y
|
||||
CONFIG_PCI_HOST_GENERIC=y
|
||||
CONFIG_PCI_LABEL=y
|
||||
CONFIG_PCI_MSI=y
|
||||
CONFIG_PCI_MSI_IRQ_DOMAIN=y
|
||||
CONFIG_PGTABLE_LEVELS=3
|
||||
CONFIG_PHYS_ADDR_T_64BIT=y
|
||||
# CONFIG_PMIC_OPREGION is not set
|
||||
CONFIG_PNP=y
|
||||
CONFIG_PNPACPI=y
|
||||
CONFIG_PNP_DEBUG_MESSAGES=y
|
||||
CONFIG_POWER_RESET=y
|
||||
CONFIG_POWER_SUPPLY=y
|
||||
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
|
||||
CONFIG_QUEUED_RWLOCKS=y
|
||||
CONFIG_QUEUED_SPINLOCKS=y
|
||||
CONFIG_RATIONAL=y
|
||||
# CONFIG_RESET_ATTACK_MITIGATION is not set
|
||||
CONFIG_RFS_ACCEL=y
|
||||
CONFIG_RODATA_FULL_DEFAULT_ENABLED=y
|
||||
CONFIG_RPS=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_EFI=y
|
||||
CONFIG_RTC_DRV_PL031=y
|
||||
CONFIG_RWSEM_SPIN_ON_OWNER=y
|
||||
CONFIG_SATA_AHCI=y
|
||||
CONFIG_SATA_AHCI_PLATFORM=y
|
||||
CONFIG_SATA_HOST=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_SCSI_COMMON=y
|
||||
CONFIG_SCSI_VIRTIO=y
|
||||
CONFIG_SERIAL_8250=y
|
||||
CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y
|
||||
CONFIG_SERIAL_8250_EXTENDED=y
|
||||
CONFIG_SERIAL_8250_FSL=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=4
|
||||
CONFIG_SERIAL_8250_PNP=y
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
|
||||
CONFIG_SERIAL_8250_SHARE_IRQ=y
|
||||
CONFIG_SERIAL_AMBA_PL011=y
|
||||
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
|
||||
CONFIG_SERIAL_EARLYCON=y
|
||||
CONFIG_SERIAL_MCTRL_GPIO=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
CONFIG_SG_POOL=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_SOCK_RX_QUEUE_MAPPING=y
|
||||
CONFIG_SPARSEMEM=y
|
||||
CONFIG_SPARSEMEM_EXTREME=y
|
||||
CONFIG_SPARSEMEM_VMEMMAP=y
|
||||
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
|
||||
CONFIG_SPARSE_IRQ=y
|
||||
CONFIG_SRCU=y
|
||||
# CONFIG_SURFACE_PLATFORMS is not set
|
||||
CONFIG_SWIOTLB=y
|
||||
CONFIG_SYSCTL_EXCEPTION_TRACE=y
|
||||
CONFIG_SYSFB=y
|
||||
# CONFIG_SYSFB_SIMPLEFB is not set
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
|
||||
CONFIG_THERMAL_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_OF=y
|
||||
CONFIG_THREAD_INFO_IN_TASK=y
|
||||
CONFIG_TICK_CPU_ACCOUNTING=y
|
||||
CONFIG_TIMER_ACPI=y
|
||||
CONFIG_TIMER_OF=y
|
||||
CONFIG_TIMER_PROBE=y
|
||||
CONFIG_TREE_RCU=y
|
||||
CONFIG_TREE_SRCU=y
|
||||
# CONFIG_UACCE is not set
|
||||
CONFIG_UCS2_STRING=y
|
||||
CONFIG_UNMAP_KERNEL_AT_EL0=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_HID=y
|
||||
CONFIG_USB_HIDDEV=y
|
||||
CONFIG_USB_PCI=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_PCI=y
|
||||
CONFIG_VIRTIO=y
|
||||
CONFIG_VIRTIO_BALLOON=y
|
||||
CONFIG_VIRTIO_BLK=y
|
||||
CONFIG_VIRTIO_CONSOLE=y
|
||||
CONFIG_VIRTIO_MMIO=y
|
||||
CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES=y
|
||||
CONFIG_VIRTIO_NET=y
|
||||
CONFIG_VIRTIO_PCI=y
|
||||
CONFIG_VIRTIO_PCI_LEGACY=y
|
||||
CONFIG_VIRTIO_PCI_LIB=y
|
||||
CONFIG_VMAP_STACK=y
|
||||
CONFIG_VT=y
|
||||
CONFIG_VT_CONSOLE=y
|
||||
# CONFIG_VT_HW_CONSOLE_BINDING is not set
|
||||
CONFIG_WATCHDOG_CORE=y
|
||||
CONFIG_XPS=y
|
||||
CONFIG_ZONE_DMA32=y
|
||||
|
|
@ -1,47 +0,0 @@
|
|||
From 0059efbd0f9c291795078fb4e50722641d525f38 Mon Sep 17 00:00:00 2001
|
||||
From: Mathew McBride <matt@traverse.com.au>
|
||||
Date: Thu, 16 Jan 2025 11:48:44 +1100
|
||||
Subject: [PATCH] printk: always setup default (tty0 + stdout / SPCR) consoles
|
||||
when no console= present
|
||||
|
||||
(This is a hack specific to OpenWrt's armsr target)
|
||||
|
||||
This change resolves a difference in behaviour between arm64 ACPI
|
||||
and DT systems.
|
||||
Our usecase is to ensure the system console is always present
|
||||
regardless of display mode (serial port or screen).
|
||||
|
||||
Both ACPI and DT have mechanisms to setup a serial console from
|
||||
information passed by firmware (SPCR and stdout-path respectively).
|
||||
|
||||
On ACPI systems, the SPCR table is parsed very early on in the kernel
|
||||
boot which prevents the screen console (tty0) from appearing if it is
|
||||
not explicitly set.
|
||||
|
||||
We would like to avoid specifying console= arguments as there are many
|
||||
possible configurations on the serial side (like ttyS0, ttyAMA0, ttymxc0
|
||||
etc.).
|
||||
|
||||
If the kernel does not consume the serial port in SPCR/stdout-path,
|
||||
then the 'default' settings from the firmware (baud rate etc.) are lost.
|
||||
|
||||
If the system administrator explicitly specifies a console= argument,
|
||||
then the old behaviour is returned.
|
||||
|
||||
Signed-off-by: Mathew McBride <matt@traverse.com.au>
|
||||
Link: https://github.com/openwrt/openwrt/pull/17012#issuecomment-2591751115
|
||||
---
|
||||
kernel/printk/printk.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
--- a/kernel/printk/printk.c
|
||||
+++ b/kernel/printk/printk.c
|
||||
@@ -3515,7 +3515,7 @@ void register_console(struct console *ne
|
||||
* Note that a console with tty binding will have CON_CONSDEV
|
||||
* flag set and will be first in the list.
|
||||
*/
|
||||
- if (preferred_console < 0) {
|
||||
+ if (!console_set_on_cmdline) {
|
||||
if (hlist_empty(&console_list) || !console_first()->device ||
|
||||
console_first()->flags & CON_BOOT) {
|
||||
try_enable_default_console(newcon);
|
||||
|
|
@ -1,376 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
|
||||
/*
|
||||
* Device Tree file for Buffalo LinkStation LS220DE
|
||||
*
|
||||
* Copyright (C) 2023 Daniel González Cabanelas <dgcbueu@gmail.com>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "armada-370.dtsi"
|
||||
#include "mvebu-linkstation-fan.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include <dt-bindings/thermal/thermal.h>
|
||||
|
||||
/ {
|
||||
model = "Buffalo LinkStation LS220DE";
|
||||
compatible = "buffalo,ls220de", "marvell,armada370", "marvell,armada-370-xp";
|
||||
|
||||
aliases {
|
||||
led-boot = &led_boot;
|
||||
led-failsafe = &led_failsafe;
|
||||
led-running = &led_power;
|
||||
led-upgrade = &led_upgrade;
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "earlycon";
|
||||
stdout-path = "serial0:115200n8";
|
||||
append-rootblock = "nullparameter="; /* override the bootloader args */
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
|
||||
soc {
|
||||
ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
|
||||
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
|
||||
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
|
||||
};
|
||||
|
||||
system_fan: gpio_fan {
|
||||
gpios = <&gpio0 13 GPIO_ACTIVE_HIGH
|
||||
&gpio0 14 GPIO_ACTIVE_HIGH>;
|
||||
alarm-gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
hdd-thermal {
|
||||
polling-delay = <20000>;
|
||||
polling-delay-passive = <2000>;
|
||||
|
||||
thermal-sensors = <&hdd0_temp>; /* only one drivetemp sensor is supported */
|
||||
|
||||
trips {
|
||||
hdd_alert1: trip1 {
|
||||
temperature = <34000>;
|
||||
hysteresis = <2000>;
|
||||
type = "active";
|
||||
};
|
||||
hdd_alert2: trip2 {
|
||||
temperature = <40000>;
|
||||
hysteresis = <2000>;
|
||||
type = "active";
|
||||
};
|
||||
hdd_alert3: trip3 {
|
||||
temperature = <45000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
hdd_hot {
|
||||
temperature = <50000>;
|
||||
hysteresis = <2000>;
|
||||
type = "hot";
|
||||
};
|
||||
hdd_crit {
|
||||
temperature = <60000>;
|
||||
hysteresis = <2000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map1 {
|
||||
trip = <&hdd_alert1>;
|
||||
cooling-device = <&system_fan THERMAL_NO_LIMIT 1>;
|
||||
};
|
||||
map2 {
|
||||
trip = <&hdd_alert2>;
|
||||
cooling-device = <&system_fan 2 2>;
|
||||
};
|
||||
map3 {
|
||||
trip = <&hdd_alert3>;
|
||||
cooling-device = <&system_fan 3 THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
pinctrl-0 = <&pmx_buttons>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
power {
|
||||
label = "Power Switch";
|
||||
linux,code = <KEY_POWER>;
|
||||
linux,input-type = <EV_SW>;
|
||||
gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
function {
|
||||
label = "Function Button";
|
||||
linux,code = <KEY_CONFIG>;
|
||||
gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio_leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmx_leds1 &pmx_leds2>;
|
||||
|
||||
indicator_red {
|
||||
function = LED_FUNCTION_INDICATOR;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
|
||||
panic-indicator;
|
||||
};
|
||||
|
||||
led_power: power_white {
|
||||
function = LED_FUNCTION_POWER;
|
||||
color = <LED_COLOR_ID_WHITE>;
|
||||
gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "on";
|
||||
};
|
||||
|
||||
led_failsafe: power_red {
|
||||
function = LED_FUNCTION_POWER;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_upgrade: power_orange {
|
||||
function = LED_FUNCTION_POWER;
|
||||
color = <LED_COLOR_ID_AMBER>;
|
||||
gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_boot: indicator_white {
|
||||
function = LED_FUNCTION_INDICATOR;
|
||||
color = <LED_COLOR_ID_WHITE>;
|
||||
gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
hdd1_red {
|
||||
function = LED_FUNCTION_DISK;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "ata1";
|
||||
function-enumerator = <1>;
|
||||
};
|
||||
|
||||
hdd2_red {
|
||||
function = LED_FUNCTION_DISK;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "ata2";
|
||||
function-enumerator = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
regulators {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-0 = <&pmx_power_hdd1 &pmx_power_hdd2>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
sata1_power: regulator@1 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <1>;
|
||||
regulator-name = "HDD1";
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
startup-delay-us = <2000000>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
sata2_power: regulator@2 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <2>;
|
||||
regulator-name = "HDD2";
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
startup-delay-us = <4000000>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&coherencyfab {
|
||||
broken-idle;
|
||||
};
|
||||
|
||||
ð1 {
|
||||
pinctrl-0 = <&ge1_rgmii_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
phy-handle = <ðphy0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
|
||||
&mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
ethphy0: ethernet-phy@0 { /* Marvell 88E1318 */
|
||||
reg = <0>;
|
||||
marvell,reg-init = <0x3 0x10 0xf000 0x091A>, /* LED function */
|
||||
<0x3 0x11 0x0000 0x4401>, /* LED polarity */
|
||||
<0x3 0x12 0x0000 0x4905>; /* LED timer */
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&nand_controller {
|
||||
status = "okay";
|
||||
|
||||
nand@0 {
|
||||
reg = <0>;
|
||||
label = "pxa3xx_nand-0";
|
||||
nand-rb = <0>;
|
||||
marvell,nand-keep-config;
|
||||
nand-on-flash-bbt;
|
||||
nand-ecc-strength = <4>;
|
||||
nand-ecc-step-size = <512>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "ubi_kernel";
|
||||
reg = <0x00000000 0x02000000>; /* 32 MiB */
|
||||
};
|
||||
|
||||
partition@2000000 {
|
||||
label = "ubi";
|
||||
reg = <0x02000000 0x1df00000>; /* 479 MiB */
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&sata {
|
||||
nr-ports = <2>;
|
||||
status = "okay";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
hdd0_temp: sata-port@0 {
|
||||
reg = <0>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
|
||||
hdd1_temp: sata-port@1 {
|
||||
reg = <1>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&spi0_pins2>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
spi-flash@0 {
|
||||
compatible = "mxicy,mx25l8005", "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <50000000>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
reg = <0x00000 0xf0000>; /* 960 KiB*/
|
||||
label = "u-boot";
|
||||
read-only;
|
||||
};
|
||||
partition@f0000 {
|
||||
reg = <0xf0000 0x10000>; /* 64 KiB */
|
||||
label = "u-boot-env";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pmsu {
|
||||
pinctrl-0 = <&pmx_power_cpu>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
pmx_power_hdd2: pmx-power-hdd2 {
|
||||
marvell,pins = "mpp2";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_power_cpu: pmx-power-cpu {
|
||||
marvell,pins = "mpp4";
|
||||
marvell,function = "vdd";
|
||||
};
|
||||
|
||||
pmx_power_hdd1: pmx-power-hdd1 {
|
||||
marvell,pins = "mpp8";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_fan_lock: pmx-fan-lock {
|
||||
marvell,pins = "mpp10";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_hdd_present: pmx-hdd-present {
|
||||
marvell,pins = "mpp11", "mpp12";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_fan_high: pmx-fan-high {
|
||||
marvell,pins = "mpp13";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_fan_low: pmx-fan-low {
|
||||
marvell,pins = "mpp14";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_buttons: pmx-buttons {
|
||||
marvell,pins = "mpp15", "mpp16";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_leds1: pmx-leds {
|
||||
marvell,pins = "mpp7", "mpp54", "mpp59", "mpp61";
|
||||
marvell,function = "gpo";
|
||||
};
|
||||
|
||||
pmx_leds2: pmx-leds {
|
||||
marvell,pins = "mpp55", "mpp57", "mpp62";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
|
@ -1,448 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
|
||||
/*
|
||||
* Device Tree file for Buffalo LinkStation LS421DE
|
||||
*
|
||||
* Copyright (C) 2020 Daniel González Cabanelas <dgcbueu@gmail.com>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "armada-370.dtsi"
|
||||
#include "mvebu-linkstation-fan.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/thermal/thermal.h>
|
||||
|
||||
/ {
|
||||
model = "Buffalo LinkStation LS421DE";
|
||||
compatible = "buffalo,ls421de", "marvell,armada370", "marvell,armada-370-xp";
|
||||
|
||||
aliases {
|
||||
led-boot = &led_boot;
|
||||
led-failsafe = &led_failsafe;
|
||||
led-running = &led_power;
|
||||
led-upgrade = &led_upgrade;
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "earlycon";
|
||||
stdout-path = "serial0:115200n8";
|
||||
append-rootblock = "nullparameter="; /* override the bootloader args */
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
|
||||
soc {
|
||||
ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
|
||||
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
|
||||
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
|
||||
};
|
||||
|
||||
system_fan: gpio_fan {
|
||||
gpios = <&gpio0 13 GPIO_ACTIVE_HIGH
|
||||
&gpio0 14 GPIO_ACTIVE_HIGH>;
|
||||
alarm-gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
hdd-thermal {
|
||||
polling-delay = <20000>;
|
||||
polling-delay-passive = <2000>;
|
||||
|
||||
thermal-sensors = <&hdd0_temp>; /* only one drivetemp sensor is supported */
|
||||
|
||||
trips {
|
||||
hdd_alert1: trip1 {
|
||||
temperature = <36000>;
|
||||
hysteresis = <2000>;
|
||||
type = "active";
|
||||
};
|
||||
hdd_alert2: trip2 {
|
||||
temperature = <44000>;
|
||||
hysteresis = <2000>;
|
||||
type = "active";
|
||||
};
|
||||
hdd_alert3: trip3 {
|
||||
temperature = <52000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
hdd_crit: trip4 {
|
||||
temperature = <60000>;
|
||||
hysteresis = <2000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map1 {
|
||||
trip = <&hdd_alert1>;
|
||||
cooling-device = <&system_fan THERMAL_NO_LIMIT 1>;
|
||||
};
|
||||
map2 {
|
||||
trip = <&hdd_alert2>;
|
||||
cooling-device = <&system_fan 2 2>;
|
||||
};
|
||||
map3 {
|
||||
trip = <&hdd_alert3>;
|
||||
cooling-device = <&system_fan 3 THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ethphy-thermal {
|
||||
polling-delay = <20000>;
|
||||
polling-delay-passive = <2000>;
|
||||
|
||||
thermal-sensors = <ðphy0>;
|
||||
|
||||
trips {
|
||||
ethphy_alert1: trip1 {
|
||||
temperature = <65000>;
|
||||
hysteresis = <4000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
ethphy_crit: trip2 {
|
||||
temperature = <100000>;
|
||||
hysteresis = <2000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map1 {
|
||||
trip = <ðphy_alert1>;
|
||||
cooling-device = <&system_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
pinctrl-0 = <&pmx_buttons>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
power {
|
||||
label = "Power Switch";
|
||||
linux,code = <KEY_POWER>;
|
||||
linux,input-type = <EV_SW>;
|
||||
gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
function {
|
||||
label = "Function Button";
|
||||
linux,code = <KEY_CONFIG>;
|
||||
gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio_leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmx_leds1 &pmx_leds2>;
|
||||
|
||||
system_red {
|
||||
label = "ls421de:red:system";
|
||||
gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_power: power_white {
|
||||
label = "ls421de:white:power";
|
||||
gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "on";
|
||||
};
|
||||
|
||||
led_failsafe: power_red {
|
||||
label = "ls421de:red:power";
|
||||
gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_upgrade: power_orange {
|
||||
label = "ls421de:orange:power";
|
||||
gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_boot: system_white {
|
||||
label = "ls421de:white:system";
|
||||
gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
hdd1_red {
|
||||
label = "ls421de:red:hdd1";
|
||||
gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "ata1";
|
||||
};
|
||||
|
||||
hdd2_red {
|
||||
label = "ls421de:red:hdd2";
|
||||
gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "ata2";
|
||||
};
|
||||
};
|
||||
|
||||
regulators {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-0 = <&pmx_power_usb &pmx_power_hdd1 &pmx_power_hdd2>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
usb_power: regulator@0 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <0>;
|
||||
regulator-name = "USB";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
sata1_power: regulator@1 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <1>;
|
||||
regulator-name = "HDD1";
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
startup-delay-us = <2000000>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
sata2_power: regulator@2 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <2>;
|
||||
regulator-name = "HDD2";
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
startup-delay-us = <4000000>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&coherencyfab {
|
||||
broken-idle;
|
||||
};
|
||||
|
||||
ð1 {
|
||||
pinctrl-0 = <&ge1_rgmii_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
phy-handle = <ðphy0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
pinctrl-names = "default";
|
||||
clock-frequency = <100000>;
|
||||
status = "okay";
|
||||
|
||||
rs5c372a: rs5c372a@32 {
|
||||
compatible = "ricoh,rs5c372a";
|
||||
reg = <0x32>;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
ethphy0: ethernet-phy@0 { /* Marvell 88E1518 */
|
||||
reg = <0>;
|
||||
marvell,reg-init = <0x2 0x10 0xffff 0x0006>, /* disable CLK125 */
|
||||
<0x3 0x10 0x0000 0x1991>, /* LED function */
|
||||
<0x3 0x11 0x0000 0x4401>, /* LED polarity */
|
||||
<0x3 0x12 0x0000 0x4905>; /* LED timer */
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pmx_pcie>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
/* Connected to uPD720202 USB 3.0 Host */
|
||||
pcie@1,0 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&pmsu {
|
||||
pinctrl-0 = <&pmx_power_cpu>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
&rtc {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&sata {
|
||||
nr-ports = <2>;
|
||||
status = "okay";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
hdd0_temp: sata-port@0 {
|
||||
reg = <0>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
|
||||
hdd1_temp: sata-port@1 {
|
||||
reg = <1>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&sdio {
|
||||
pinctrl-0 = <&sdio_pins2>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
/* No CD or WP GPIOs */
|
||||
broken-cd;
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&nand_controller {
|
||||
status = "okay";
|
||||
|
||||
nand@0 {
|
||||
reg = <0>;
|
||||
label = "pxa3xx_nand-0";
|
||||
nand-rb = <0>;
|
||||
marvell,nand-keep-config;
|
||||
nand-on-flash-bbt;
|
||||
nand-ecc-strength = <4>;
|
||||
nand-ecc-step-size = <512>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "kernel";
|
||||
reg = <0x00000000 0x02000000>; /* 32 MiB */
|
||||
};
|
||||
|
||||
partition@2000000 {
|
||||
label = "ubi";
|
||||
reg = <0x02000000 0x1e000000>; /* 480 MiB */
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&spi0_pins2>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
spi-flash@0 {
|
||||
compatible = "mxicy,mx25l8005", "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <50000000>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
reg = <0x00000 0xf0000>; /* 960 KiB*/
|
||||
label = "u-boot";
|
||||
read-only;
|
||||
};
|
||||
partition@f0000 {
|
||||
reg = <0xf0000 0x10000>; /* 64 KiB */
|
||||
label = "u-boot-env";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
pmx_power_cpu: pmx-power-cpu {
|
||||
marvell,pins = "mpp4";
|
||||
marvell,function = "vdd";
|
||||
};
|
||||
|
||||
pmx_power_usb: pmx-power-usb {
|
||||
marvell,pins = "mpp5";
|
||||
marvell,function = "gpo";
|
||||
};
|
||||
|
||||
pmx_power_hdd1: pmx-power-hdd1 {
|
||||
marvell,pins = "mpp8";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_power_hdd2: pmx-power-hdd2 {
|
||||
marvell,pins = "mpp9";
|
||||
marvell,function = "gpo";
|
||||
};
|
||||
|
||||
pmx_fan_lock: pmx-fan-lock {
|
||||
marvell,pins = "mpp10";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_hdd_present: pmx-hdd-present {
|
||||
marvell,pins = "mpp11", "mpp12";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_fan_high: pmx-fan-high {
|
||||
marvell,pins = "mpp13";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_fan_low: pmx-fan-low {
|
||||
marvell,pins = "mpp14";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_buttons: pmx-buttons {
|
||||
marvell,pins = "mpp15", "mpp16";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_leds1: pmx-leds {
|
||||
marvell,pins = "mpp7", "mpp54", "mpp59", "mpp61";
|
||||
marvell,function = "gpo";
|
||||
};
|
||||
|
||||
pmx_leds2: pmx-leds {
|
||||
marvell,pins = "mpp55", "mpp57", "mpp62";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_pcie: pmx-pcie {
|
||||
marvell,pins = "mpp56", "mpp60";
|
||||
marvell,function = "pcie";
|
||||
};
|
||||
};
|
||||
|
|
@ -1,424 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
|
||||
/*
|
||||
* Device Tree file for Ctera C200-V2
|
||||
*
|
||||
* Copyright (C) 2021 Pawel Dembicki <paweldembicki@gmail.com>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "armada-370.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/thermal/thermal.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
|
||||
/ {
|
||||
model = "Ctera C200 V2";
|
||||
compatible = "ctera,c200-v2", "marvell,armada370", "marvell,armada-370-xp";
|
||||
|
||||
aliases {
|
||||
led-boot = &led_status_green;
|
||||
led-failsafe = &led_status_red;
|
||||
led-running = &led_status_green;
|
||||
led-upgrade = &led_status_red;
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x40000000>; /* 1024 MB */
|
||||
};
|
||||
|
||||
soc {
|
||||
ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
|
||||
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
|
||||
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
ethphy-thermal {
|
||||
polling-delay = <20000>;
|
||||
polling-delay-passive = <2000>;
|
||||
|
||||
thermal-sensors = <ðphy0>;
|
||||
|
||||
trips {
|
||||
ethphy_alert1: trip1 {
|
||||
temperature = <65000>;
|
||||
hysteresis = <4000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
ethphy_crit: trip2 {
|
||||
temperature = <100000>;
|
||||
hysteresis = <2000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
keys {
|
||||
compatible = "gpio-keys";
|
||||
pinctrl-0 = <&pmx_buttons>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
power {
|
||||
label = "Power Button";
|
||||
linux,code = <KEY_POWER>;
|
||||
gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
reset {
|
||||
label = "Reset Button";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
usb1 {
|
||||
label = "USB1 Button";
|
||||
linux,code = <BTN_0>;
|
||||
gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
usb2 {
|
||||
label = "USB2 Button";
|
||||
linux,code = <BTN_1>;
|
||||
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio-poweroff {
|
||||
compatible = "gpio-poweroff";
|
||||
pinctrl-0 = <&pmx_poweroff>;
|
||||
pinctrl-names = "default";
|
||||
gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-0 = <&pmx_leds1 &pmx_leds2>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
led-0 {
|
||||
function = LED_FUNCTION_USB;
|
||||
function-enumerator = <2>;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
led-1 {
|
||||
function = LED_FUNCTION_USB;
|
||||
function-enumerator = <2>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "usbport";
|
||||
trigger-sources = <&usb1_port 1>, <&usb2_port 1>;
|
||||
};
|
||||
|
||||
led-2 {
|
||||
function = LED_FUNCTION_USB;
|
||||
function-enumerator = <1>;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
led-3 {
|
||||
function = LED_FUNCTION_USB;
|
||||
function-enumerator = <1>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "usbport";
|
||||
trigger-sources = <&usb1_port 2>, <&usb2_port 2>;
|
||||
};
|
||||
|
||||
led-4 {
|
||||
function = LED_FUNCTION_DISK;
|
||||
function-enumerator = <2>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "ata2";
|
||||
};
|
||||
|
||||
led-5 {
|
||||
function = LED_FUNCTION_DISK;
|
||||
function-enumerator = <1>;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
led-6 {
|
||||
function = LED_FUNCTION_DISK;
|
||||
function-enumerator = <2>;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
led-7 {
|
||||
function = LED_FUNCTION_INDICATOR;
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led-8 {
|
||||
function = LED_FUNCTION_DISK_ERR;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
led-9 {
|
||||
function = LED_FUNCTION_DISK_ERR;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
led_status_red: led-10 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
led-11 {
|
||||
function = LED_FUNCTION_DISK;
|
||||
function-enumerator = <1>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "ata1";
|
||||
};
|
||||
|
||||
led_status_green: led-12 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&coherencyfab {
|
||||
broken-idle;
|
||||
};
|
||||
|
||||
ð1 {
|
||||
pinctrl-0 = <&ge1_rgmii_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
phy-handle = <ðphy0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
pinctrl-names = "default";
|
||||
clock-frequency = <100000>;
|
||||
status = "okay";
|
||||
|
||||
hwmon@2a {
|
||||
compatible = "nuvoton,nct7802";
|
||||
reg = <0x2a>;
|
||||
};
|
||||
|
||||
rtc@30 {
|
||||
compatible = "sii,s35390a";
|
||||
reg = <0x30>;
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
ethphy0: ethernet-phy@0 { /* Marvell 88E1318 */
|
||||
reg = <0>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&nand_controller {
|
||||
status = "okay";
|
||||
|
||||
nand@0 {
|
||||
reg = <0>;
|
||||
label = "pxa3xx_nand-0";
|
||||
nand-rb = <0>;
|
||||
marvell,nand-keep-config;
|
||||
nand-on-flash-bbt;
|
||||
nand-ecc-strength = <4>;
|
||||
nand-ecc-step-size = <512>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "uboot";
|
||||
reg = <0x0000000 0x200000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@200000 {
|
||||
label = "certificate";
|
||||
reg = <0x0200000 0x100000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@300000 {
|
||||
label = "preset_cfg";
|
||||
reg = <0x0300000 0x100000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@400000 {
|
||||
label = "dev_params";
|
||||
reg = <0x0400000 0x100000>;
|
||||
read-only;
|
||||
};
|
||||
partition@500000 {
|
||||
label = "active_bank";
|
||||
reg = <0x0500000 0x0100000>;
|
||||
};
|
||||
|
||||
partition@600000 {
|
||||
label = "magic";
|
||||
reg = <0x0600000 0x0100000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@700000 {
|
||||
label = "bank1";
|
||||
reg = <0x0700000 0x2800000>;
|
||||
};
|
||||
|
||||
partition@2f00000 {
|
||||
label = "bank2";
|
||||
reg = <0x2f00000 0x2800000>;
|
||||
};
|
||||
|
||||
/* 0x5700000-0x5a00000 undefined in vendor firmware */
|
||||
|
||||
partition@5a00000 {
|
||||
label = "reserved";
|
||||
reg = <0x5a00000 0x2000000>;
|
||||
};
|
||||
|
||||
partition@7a00000 {
|
||||
label = "ubi";
|
||||
reg = <0x7a00000 0x8600000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
|
||||
pcie@1,0 {
|
||||
pinctrl-0 = <&pmx_pcie>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
|
||||
|
||||
/* -[0000:00]---01.0-[01]----00.0 */
|
||||
/* usbport trigger won't work */
|
||||
bridge@0,1 {
|
||||
compatible = "pci11ab,6710";
|
||||
reg = <0x3800 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
|
||||
usb@1,0 {
|
||||
/* Renesas uPD720202 */
|
||||
compatible = "pci1912,0015";
|
||||
reg = <0x1000 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
|
||||
usb1_port: port@1 {
|
||||
reg = <1>;
|
||||
#trigger-source-cells = <1>;
|
||||
};
|
||||
|
||||
usb2_port: port@2 {
|
||||
reg = <2>;
|
||||
#trigger-source-cells = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
pmx_poweroff: pmx-poweroff {
|
||||
marvell,pins = "mpp7";
|
||||
marvell,function = "gpo";
|
||||
};
|
||||
|
||||
pmx_power_cpu: pmx-power-cpu {
|
||||
marvell,pins = "mpp4";
|
||||
marvell,function = "vdd";
|
||||
};
|
||||
|
||||
pmx_buttons: pmx-buttons {
|
||||
marvell,pins = "mpp6", "mpp10", "mpp14", "mpp32";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_leds1: pmx-leds1 {
|
||||
marvell,pins = "mpp47";
|
||||
marvell,function = "gpo";
|
||||
};
|
||||
|
||||
pmx_leds2: pmx-leds2 {
|
||||
marvell,pins = "mpp12", "mpp13", "mpp15", "mpp16", "mpp50", "mpp51",
|
||||
"mpp52", "mpp53", "mpp55", "mpp56", "mpp57", "mpp58";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_pcie: pmx-pcie {
|
||||
marvell,pins = "mpp59";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
/* this gpio is connected to the pin of buzzer
|
||||
* leave it as is due lack of proper driver
|
||||
*/
|
||||
pmx_buzzer: pmx-buzzer {
|
||||
marvell,pins = "mpp63";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
&pmsu {
|
||||
pinctrl-0 = <&pmx_power_cpu>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
&rtc {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&sata {
|
||||
nr-ports = <2>;
|
||||
status = "okay";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
hdd0_temp: sata-port@0 {
|
||||
reg = <0>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
|
||||
hdd1_temp: sata-port@1 {
|
||||
reg = <1>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -1,389 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include "armada-380.dtsi"
|
||||
|
||||
/ {
|
||||
model = "IIJ SA-W2";
|
||||
compatible = "iij,sa-w2", "marvell,armada380";
|
||||
|
||||
aliases {
|
||||
led-boot = &led_power_green;
|
||||
led-failsafe = &led_power_red;
|
||||
led-running = &led_power_green;
|
||||
led-upgrade = &led_power_green;
|
||||
label-mac-device = &ge0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x10000000>; /* 256MB */
|
||||
};
|
||||
|
||||
soc {
|
||||
ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
|
||||
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
|
||||
MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
|
||||
MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
|
||||
MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
|
||||
|
||||
pcie {
|
||||
status = "okay";
|
||||
|
||||
pcie@1,0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pcie@3,0 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
keys {
|
||||
compatible = "gpio-keys";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmx_keys_pins>;
|
||||
|
||||
button-init {
|
||||
label = "init";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmx_leds_pins>;
|
||||
|
||||
led-0 {
|
||||
gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_WLAN_5GHZ;
|
||||
linux,default-trigger = "phy0tpt";
|
||||
};
|
||||
|
||||
led-1 {
|
||||
gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = LED_FUNCTION_WLAN_5GHZ;
|
||||
};
|
||||
|
||||
led-2 {
|
||||
gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_STATUS;
|
||||
};
|
||||
|
||||
led-3 {
|
||||
gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = LED_FUNCTION_STATUS;
|
||||
};
|
||||
|
||||
led-4 {
|
||||
gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_MOBILE;
|
||||
};
|
||||
|
||||
led-5 {
|
||||
gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = LED_FUNCTION_MOBILE;
|
||||
};
|
||||
|
||||
led-6 {
|
||||
gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_WLAN_2GHZ;
|
||||
linux,default-trigger = "phy1tpt";
|
||||
};
|
||||
|
||||
led-7 {
|
||||
gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = LED_FUNCTION_WLAN_2GHZ;
|
||||
};
|
||||
|
||||
led_power_green: led-8 {
|
||||
gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_POWER;
|
||||
};
|
||||
|
||||
led_power_red: led-9 {
|
||||
gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = LED_FUNCTION_POWER;
|
||||
};
|
||||
|
||||
led-10 {
|
||||
gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_USB;
|
||||
function-enumerator = <1>;
|
||||
linux,default-trigger = "usbport";
|
||||
trigger-sources = <&hub_port2>;
|
||||
};
|
||||
|
||||
led-11 {
|
||||
gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_USB;
|
||||
function-enumerator = <0>;
|
||||
linux,default-trigger = "usbport";
|
||||
trigger-sources = <&hub_port1>;
|
||||
};
|
||||
};
|
||||
|
||||
regulator-vbus-usb0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vbus-usb0";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator-vbus-usb1 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vbus-usb1";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
pmx_usb_pins: usb-pins {
|
||||
marvell,pins = "mpp2", /* smsc usb2514b reset */
|
||||
"mpp48", "mpp49", /* port over current */
|
||||
"mpp52", "mpp53"; /* port vbus */
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_keys_pins: keys-pins {
|
||||
marvell,pins = "mpp18";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_leds_pins: leds-pins {
|
||||
marvell,pins = "mpp19", "mpp20", "mpp33", "mpp34", "mpp35",
|
||||
"mpp36", "mpp44", "mpp45", "mpp46", "mpp47",
|
||||
"mpp54", "mpp55";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
&gpio0 {
|
||||
usb-hub-reset {
|
||||
gpio-hog;
|
||||
gpios = <2 GPIO_ACTIVE_HIGH>;
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmx_usb_pins>;
|
||||
status = "okay";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/* SMSC USB2514B on PCB */
|
||||
hub@1 {
|
||||
compatible = "usb424,2514";
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
hub_port1: port@1 {
|
||||
reg = <1>;
|
||||
#trigger-source-cells = <0>;
|
||||
};
|
||||
|
||||
hub_port2: port@2 {
|
||||
reg = <2>;
|
||||
#trigger-source-cells = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&bm {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bm_bppi {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ð1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ge1_rgmii_pins>;
|
||||
status = "okay";
|
||||
|
||||
phy-connection-type = "rgmii-id";
|
||||
buffer-manager = <&bm>;
|
||||
bm,pool-long = <2>;
|
||||
bm,pool-short = <3>;
|
||||
|
||||
nvmem-cells = <&macaddr_bdinfo_6 1>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
status = "okay";
|
||||
|
||||
/* Marvell 88E6172 */
|
||||
switch@0 {
|
||||
compatible = "marvell,mv88e6085";
|
||||
reg = <0x0>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "ge1_0";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "ge1_1";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "ge1_2";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "ge1_3";
|
||||
};
|
||||
|
||||
ge0: port@4 {
|
||||
reg = <4>;
|
||||
label = "ge0";
|
||||
nvmem-cells = <&macaddr_bdinfo_6 0>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
/*
|
||||
* eth0 is connected to port5 for WAN connection
|
||||
* on port4 ("GE0")
|
||||
*/
|
||||
|
||||
port@6 {
|
||||
reg = <6>;
|
||||
label = "cpu";
|
||||
ethernet = <ð1>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rtc {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi1_pins>;
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <40000000>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
reg = <0x0 0x100000>;
|
||||
label = "bootloader";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
reg = <0x100000 0x10000>;
|
||||
label = "bootloader-env";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@110000 {
|
||||
reg = <0x110000 0xf0000>;
|
||||
label = "board_info";
|
||||
read-only;
|
||||
|
||||
nvmem-layout {
|
||||
compatible = "fixed-layout";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
macaddr_bdinfo_6: macaddr@6 {
|
||||
compatible = "mac-base";
|
||||
reg = <0x6 0x6>;
|
||||
#nvmem-cell-cells = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
partition@200000 {
|
||||
compatible = "iij,seil-firmware";
|
||||
reg = <0x200000 0xf00000>;
|
||||
label = "firmware";
|
||||
iij,bootdev-name = "flash";
|
||||
iij,seil-id = <0x5345494c 0x32303135>;
|
||||
};
|
||||
|
||||
partition@1100000 {
|
||||
compatible = "iij,seil-firmware";
|
||||
reg = <0x1100000 0xf00000>;
|
||||
label = "rescue";
|
||||
iij,bootdev-name = "rescue";
|
||||
iij,seil-id = <0x5345494c 0x32303135>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,8 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
|
||||
#include "armada-385-fortinet-fg-3xe.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Fortinet FortiGate 30E";
|
||||
compatible = "fortinet,fg-30e", "marvell,armada385", "marvell,armada380";
|
||||
};
|
||||
|
|
@ -1,96 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
|
||||
#include "armada-385-fortinet-fg-xxe.dtsi"
|
||||
|
||||
/ {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x40000000>; /* 1GB */
|
||||
};
|
||||
};
|
||||
|
||||
&gpio_leds {
|
||||
led-14 {
|
||||
gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
|
||||
color = <LED_COLOR_ID_AMBER>;
|
||||
function = LED_FUNCTION_SPEED_WAN;
|
||||
linux,default-trigger = "mv88e6xxx-0:00:100Mbps";
|
||||
};
|
||||
|
||||
led-15 {
|
||||
gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_SPEED_WAN;
|
||||
linux,default-trigger = "mv88e6xxx-0:00:1Gbps";
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
pmx_switch_pins: switch-pins {
|
||||
marvell,pins = "mpp19";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mdio_pins>, <&pmx_switch_pins>;
|
||||
|
||||
/* Marvell 88E6176 */
|
||||
switch@2 {
|
||||
compatible = "marvell,mv88e6085";
|
||||
reg = <0x2>;
|
||||
reset-gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "wan";
|
||||
nvmem-cells = <&macaddr_bdinfo_d880 1>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan4";
|
||||
nvmem-cells = <&macaddr_bdinfo_d880 5>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan3";
|
||||
nvmem-cells = <&macaddr_bdinfo_d880 4>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan2";
|
||||
nvmem-cells = <&macaddr_bdinfo_d880 3>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
port@4 {
|
||||
reg = <4>;
|
||||
label = "lan1";
|
||||
nvmem-cells = <&macaddr_bdinfo_d880 2>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
port@6 {
|
||||
reg = <6>;
|
||||
ethernet = <ð0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,8 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
|
||||
#include "armada-385-fortinet-fg-5xe.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Fortinet FortiGate 50E";
|
||||
compatible = "fortinet,fg-50e", "marvell,armada385", "marvell,armada380";
|
||||
};
|
||||
|
|
@ -1,12 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
|
||||
#include "armada-385-fortinet-fg-5xe.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Fortinet FortiGate 51E";
|
||||
compatible = "fortinet,fg-51e", "marvell,armada385", "marvell,armada380";
|
||||
};
|
||||
|
||||
&ahci0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -1,12 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
|
||||
#include "armada-385-fortinet-fg-5xe.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Fortinet FortiGate 52E";
|
||||
compatible = "fortinet,fg-52e", "marvell,armada385", "marvell,armada380";
|
||||
};
|
||||
|
||||
&ahci0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -1,172 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
|
||||
#include "armada-385-fortinet-fg-xxe.dtsi"
|
||||
|
||||
/ {
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x80000000>; /* 2GB */
|
||||
};
|
||||
};
|
||||
|
||||
&gpio_leds {
|
||||
led-14 {
|
||||
gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_SPEED_WAN;
|
||||
function-enumerator = <1>;
|
||||
linux,default-trigger = "f1072004.mdio-mii:00:1Gbps";
|
||||
};
|
||||
|
||||
led-15 {
|
||||
gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_SPEED_WAN;
|
||||
function-enumerator = <2>;
|
||||
linux,default-trigger = "f1072004.mdio-mii:01:1Gbps";
|
||||
};
|
||||
|
||||
led-16 {
|
||||
gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
|
||||
color = <LED_COLOR_ID_AMBER>;
|
||||
function = LED_FUNCTION_SPEED_LAN;
|
||||
function-enumerator = <5>;
|
||||
linux,default-trigger = "mv88e6xxx-0:00:100Mbps";
|
||||
};
|
||||
|
||||
led-17 {
|
||||
gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_SPEED_LAN;
|
||||
function-enumerator = <5>;
|
||||
linux,default-trigger = "mv88e6xxx-0:00:1Gbps";
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
pmx_phy_switch_pins: phy-switch-pins {
|
||||
marvell,pins = "mpp19", "mpp20", "mpp23", "mpp34", "mpp41";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
ð1 {
|
||||
status = "okay";
|
||||
|
||||
phy-handle = <ðphy0>;
|
||||
phy-connection-type = "sgmii";
|
||||
buffer-manager = <&bm>;
|
||||
bm,pool-long = <2>;
|
||||
nvmem-cells = <&macaddr_bdinfo_d880 1>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
ð2 {
|
||||
status = "okay";
|
||||
|
||||
phy-handle = <ðphy1>;
|
||||
phy-connection-type = "sgmii";
|
||||
buffer-manager = <&bm>;
|
||||
bm,pool-long = <3>;
|
||||
nvmem-cells = <&macaddr_bdinfo_d880 2>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
&mdio {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mdio_pins>, <&pmx_phy_switch_pins>;
|
||||
|
||||
/* Marvell 88E1512 */
|
||||
ethphy0: ethernet-phy@0 {
|
||||
compatible = "ethernet-phy-id0141,0dd1",
|
||||
"ethernet-phy-ieee802.3-c22";
|
||||
reg = <0x0>;
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
|
||||
reset-gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
|
||||
reset-assert-us = <10000>;
|
||||
reset-deassert-us = <10000>;
|
||||
/*
|
||||
* LINK/ACT (Green): LED[0], Active Low
|
||||
* SPEED 100M (Amber): LED[1], Active High
|
||||
*/
|
||||
marvell,reg-init = <3 16 0 0x71>,
|
||||
<3 17 0 0x4>;
|
||||
};
|
||||
|
||||
/* Marvell 88E1512 */
|
||||
ethphy1: ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-id0141,0dd1",
|
||||
"ethernet-phy-ieee802.3-c22";
|
||||
reg = <0x1>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
|
||||
reset-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
|
||||
reset-assert-us = <10000>;
|
||||
reset-deassert-us = <10000>;
|
||||
/*
|
||||
* LINK/ACT (Green): LED[0], Active Low
|
||||
* SPEED 100M (Amber): LED[1], Active High
|
||||
*/
|
||||
marvell,reg-init = <3 16 0 0x71>,
|
||||
<3 17 0 0x4>;
|
||||
};
|
||||
|
||||
/* Marvell 88E6176 */
|
||||
switch@2 {
|
||||
compatible = "marvell,mv88e6085";
|
||||
reg = <0x2>;
|
||||
reset-gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan5";
|
||||
nvmem-cells = <&macaddr_bdinfo_d880 7>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan4";
|
||||
nvmem-cells = <&macaddr_bdinfo_d880 6>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan3";
|
||||
nvmem-cells = <&macaddr_bdinfo_d880 5>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan2";
|
||||
nvmem-cells = <&macaddr_bdinfo_d880 4>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
port@4 {
|
||||
reg = <4>;
|
||||
label = "lan1";
|
||||
nvmem-cells = <&macaddr_bdinfo_d880 3>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
port@6 {
|
||||
reg = <6>;
|
||||
ethernet = <ð0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,346 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include "armada-385.dtsi"
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
led-boot = &led_status_green;
|
||||
led-failsafe = &led_status_red;
|
||||
led-running = &led_status_green;
|
||||
led-upgrade = &led_status_green;
|
||||
label-mac-device = ð0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:9600n8";
|
||||
};
|
||||
|
||||
soc {
|
||||
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
|
||||
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
|
||||
MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
|
||||
MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
|
||||
MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmx_gpio_keys_pins>;
|
||||
|
||||
reset {
|
||||
label = "reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio_leds: gpio-leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmx_gpio_leds_pins>;
|
||||
|
||||
led-0 {
|
||||
gpios = <&gpio0 30 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = LED_FUNCTION_ALARM;
|
||||
};
|
||||
|
||||
led-1 {
|
||||
gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = "ha";
|
||||
};
|
||||
|
||||
led_status_green: led-2 {
|
||||
gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_STATUS;
|
||||
};
|
||||
|
||||
led-3 {
|
||||
gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = "ha";
|
||||
};
|
||||
|
||||
led-4 {
|
||||
gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_AMBER>;
|
||||
function = LED_FUNCTION_ALARM;
|
||||
};
|
||||
|
||||
led_status_red: led-5 {
|
||||
gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = LED_FUNCTION_STATUS;
|
||||
};
|
||||
|
||||
led-6 {
|
||||
gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_SPEED_LAN;
|
||||
function-enumerator = <4>;
|
||||
linux,default-trigger = "mv88e6xxx-0:01:1Gbps";
|
||||
};
|
||||
|
||||
led-7 {
|
||||
gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_AMBER>;
|
||||
function = LED_FUNCTION_SPEED_LAN;
|
||||
function-enumerator = <4>;
|
||||
linux,default-trigger = "mv88e6xxx-0:01:100Mbps";
|
||||
};
|
||||
|
||||
led-8 {
|
||||
gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_AMBER>;
|
||||
function = LED_FUNCTION_SPEED_LAN;
|
||||
function-enumerator = <3>;
|
||||
linux,default-trigger = "mv88e6xxx-0:02:100Mbps";
|
||||
};
|
||||
|
||||
led-9 {
|
||||
gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_SPEED_LAN;
|
||||
function-enumerator = <3>;
|
||||
linux,default-trigger = "mv88e6xxx-0:02:1Gbps";
|
||||
};
|
||||
|
||||
led-10 {
|
||||
gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_SPEED_LAN;
|
||||
function-enumerator = <1>;
|
||||
linux,default-trigger = "mv88e6xxx-0:04:1Gbps";
|
||||
};
|
||||
|
||||
led-11 {
|
||||
gpios = <&gpio2 13 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_AMBER>;
|
||||
function = LED_FUNCTION_SPEED_LAN;
|
||||
function-enumerator = <1>;
|
||||
linux,default-trigger = "mv88e6xxx-0:04:100Mbps";
|
||||
};
|
||||
|
||||
led-12 {
|
||||
gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_SPEED_LAN;
|
||||
function-enumerator = <2>;
|
||||
linux,default-trigger = "mv88e6xxx-0:03:1Gbps";
|
||||
};
|
||||
|
||||
led-13 {
|
||||
gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_AMBER>;
|
||||
function = LED_FUNCTION_SPEED_LAN;
|
||||
function-enumerator = <2>;
|
||||
linux,default-trigger = "mv88e6xxx-0:03:100Mbps";
|
||||
};
|
||||
};
|
||||
|
||||
reg_usb_vbus: regulator-usb-vbus {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb-vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
status = "okay";
|
||||
|
||||
gpio2: gpio@24 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x24>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <0x2>;
|
||||
};
|
||||
|
||||
hwmon@28 {
|
||||
compatible = "nuvoton,nct7802";
|
||||
reg = <0x28>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
pmx_gpio_leds_pins: gpio-leds-pins {
|
||||
marvell,pins = "mpp30", "mpp32", "mpp33", "mpp35",
|
||||
"mpp45", "mpp47";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_usb_pins: usb-pins {
|
||||
marvell,pins = "mpp53";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_gpio_keys_pins: gpio-keys-pins {
|
||||
marvell,pins = "mpp54";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
&bm {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bm_bppi {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ð0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ge0_rgmii_pins>;
|
||||
status = "okay";
|
||||
|
||||
phy-connection-type = "rgmii-id";
|
||||
buffer-manager = <&bm>;
|
||||
bm,pool-long = <0>;
|
||||
bm,pool-short = <1>;
|
||||
nvmem-cells = <&macaddr_bdinfo_d880 0>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
&usb3_0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmx_usb_pins>;
|
||||
status = "okay";
|
||||
|
||||
vbus-supply = <®_usb_vbus>;
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi1_pins>;
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <50000000>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
reg = <0x0 0x1c0000>;
|
||||
label = "u-boot";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@1c0000 {
|
||||
reg = <0x1c0000 0x10000>;
|
||||
label = "firmware-info";
|
||||
|
||||
/*
|
||||
* 0x10 - 0x2f : image name (image1)
|
||||
* 0x30 - 0x4f : image name (image2)
|
||||
* 0x170 (1byte): active image (0x0/0x1)
|
||||
* 0x184 - 0x185: kernel block count (image1)
|
||||
* 0x18c - 0x18d: rootfs block count (image1)
|
||||
* 0x194 - 0x195: kernel block count (image2)
|
||||
* 0x19c - 0x19d: rootfs block count (image2)
|
||||
* 0x1be (1byte): bit7 -> active flag (image1)?
|
||||
* 0x1ce (1byte): bit7 -> active flag (image2)?
|
||||
*
|
||||
* Note: block size --> 0x200 (512 bytes)
|
||||
*/
|
||||
};
|
||||
|
||||
partition@1d0000 {
|
||||
reg = <0x1d0000 0x10000>;
|
||||
label = "dtb";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@1e0000 {
|
||||
reg = <0x1e0000 0x10000>;
|
||||
label = "u-boot-env";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@1f0000 {
|
||||
reg = <0x1f0000 0x10000>;
|
||||
label = "board-info";
|
||||
read-only;
|
||||
|
||||
nvmem-layout {
|
||||
compatible = "fixed-layout";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
macaddr_bdinfo_d880: macaddr@d880 {
|
||||
compatible = "mac-base";
|
||||
reg = <0xd880 0x6>;
|
||||
#nvmem-cell-cells = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
partition@200000 {
|
||||
reg = <0x200000 0x600000>;
|
||||
label = "kernel";
|
||||
};
|
||||
|
||||
partition@800000 {
|
||||
reg = <0x800000 0x1800000>;
|
||||
label = "rootfs";
|
||||
};
|
||||
|
||||
partition@2000000 {
|
||||
reg = <0x2000000 0x600000>;
|
||||
label = "kn2";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@2600000 {
|
||||
reg = <0x2600000 0x1800000>;
|
||||
label = "rfs2";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@3e00000 {
|
||||
reg = <0x3e00000 0x1200000>;
|
||||
label = "part1";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@5000000 {
|
||||
reg = <0x5000000 0x1200000>;
|
||||
label = "part2";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@6200000 {
|
||||
reg = <0x6200000 0x1e00000>;
|
||||
label = "config";
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,20 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
|
||||
#include "armada-385-fortinet-fg-5xe.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Fortinet FortiWiFi 50E-2R";
|
||||
compatible = "fortinet,fwf-50e-2r", "marvell,armada385", "marvell,armada380";
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -1,20 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
|
||||
#include "armada-385-fortinet-fg-5xe.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Fortinet FortiWiFi 51E";
|
||||
compatible = "fortinet,fwf-51e", "marvell,armada385", "marvell,armada380";
|
||||
};
|
||||
|
||||
&ahci0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pciec {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -1,213 +0,0 @@
|
|||
/*
|
||||
* Device Tree file for the Linksys WRT32X (Venom)
|
||||
*
|
||||
* Copyright (C) 2017 Imre Kaloz <kaloz@openwrt.org>
|
||||
*
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is licensed under the terms of the GNU General Public
|
||||
* License version 2. This program is licensed "as is" without
|
||||
* any warranty of any kind, whether express or implied.
|
||||
*
|
||||
* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include "armada-385-linksys.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Linksys WRT32X";
|
||||
compatible = "linksys,wrt32x", "linksys,venom", "linksys,armada385",
|
||||
"marvell,armada385", "marvell,armada380";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200";
|
||||
stdout-path = "serial0:115200n8";
|
||||
append-rootblock = "root=/dev/mtdblock";
|
||||
};
|
||||
};
|
||||
|
||||
&expander0 {
|
||||
wan_amber@0 {
|
||||
label = "venom:amber:wan";
|
||||
reg = <0x0>;
|
||||
};
|
||||
|
||||
wan_blue@1 {
|
||||
label = "venom:blue:wan";
|
||||
reg = <0x1>;
|
||||
};
|
||||
|
||||
usb2@5 {
|
||||
label = "venom:blue:usb2";
|
||||
reg = <0x5>;
|
||||
};
|
||||
|
||||
usb3_1@6 {
|
||||
label = "venom:blue:usb3_1";
|
||||
reg = <0x6>;
|
||||
};
|
||||
|
||||
usb3_2@7 {
|
||||
label = "venom:blue:usb3_2";
|
||||
reg = <0x7>;
|
||||
};
|
||||
|
||||
wps_blue@8 {
|
||||
label = "venom:blue:wps";
|
||||
reg = <0x8>;
|
||||
};
|
||||
|
||||
wps_amber@9 {
|
||||
label = "venom:amber:wps";
|
||||
reg = <0x9>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpio_leds {
|
||||
power {
|
||||
gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
|
||||
label = "venom:blue:power";
|
||||
};
|
||||
|
||||
sata {
|
||||
gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
|
||||
label = "venom:blue:sata";
|
||||
};
|
||||
|
||||
wlan_2g {
|
||||
gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
|
||||
label = "venom:blue:wlan_2g";
|
||||
};
|
||||
|
||||
wlan_5g {
|
||||
gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
|
||||
label = "venom:blue:wlan_5g";
|
||||
};
|
||||
};
|
||||
|
||||
&gpio_leds_pins {
|
||||
marvell,pins = "mpp21", "mpp45", "mpp46", "mpp56";
|
||||
};
|
||||
|
||||
&nand {
|
||||
/* Spansion S34ML02G2 256MiB, OEM Layout */
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "u-boot";
|
||||
reg = <0x0000000 0x200000>; /* 2MB */
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@200000 {
|
||||
label = "u_env";
|
||||
reg = <0x200000 0x20000>; /* 128KB */
|
||||
};
|
||||
|
||||
partition@220000 {
|
||||
label = "s_env";
|
||||
reg = <0x220000 0x40000>; /* 256KB */
|
||||
};
|
||||
|
||||
partition@180000 {
|
||||
label = "unused_area";
|
||||
reg = <0x260000 0x5c0000>; /* 5.75MB */
|
||||
};
|
||||
|
||||
partition@7e0000 {
|
||||
label = "devinfo";
|
||||
reg = <0x7e0000 0x40000>; /* 256KB */
|
||||
read-only;
|
||||
};
|
||||
|
||||
/* kernel1 overlaps with rootfs1 by design */
|
||||
partition@900000 {
|
||||
label = "kernel1";
|
||||
reg = <0x900000 0x7b00000>; /* 123MB */
|
||||
};
|
||||
|
||||
partition@f00000 {
|
||||
label = "rootfs1";
|
||||
reg = <0xf00000 0x7500000>; /* 117MB */
|
||||
};
|
||||
|
||||
/* kernel2 overlaps with rootfs2 by design */
|
||||
partition@8400000 {
|
||||
label = "kernel2";
|
||||
reg = <0x8400000 0x7b00000>; /* 123MB */
|
||||
};
|
||||
|
||||
partition@8a00000 {
|
||||
label = "rootfs2";
|
||||
reg = <0x8a00000 0x7500000>; /* 117MB */
|
||||
};
|
||||
|
||||
/* last MB is for the BBT, not writable */
|
||||
partition@ff00000 {
|
||||
label = "BBT";
|
||||
reg = <0xff00000 0x100000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
&pcie1 {
|
||||
mwlwifi {
|
||||
marvell,chainmask = <4 4>;
|
||||
};
|
||||
};
|
||||
|
||||
&pcie2 {
|
||||
mwlwifi {
|
||||
marvell,chainmask = <4 4>;
|
||||
};
|
||||
};
|
||||
|
||||
&sdhci {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdhci_pins>;
|
||||
no-1-8-v;
|
||||
non-removable;
|
||||
wp-inverted;
|
||||
bus-width = <8>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_1_vbus {
|
||||
gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&usb3_1_vbus_pins {
|
||||
marvell,pins = "mpp44";
|
||||
};
|
||||
|
|
@ -1,322 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
|
||||
/*
|
||||
* Device Tree file for ipTIME NAS1dual
|
||||
*
|
||||
* Copyright (C) 2020 Sungbo Eo <mans0n@gorani.run>
|
||||
*
|
||||
* Based on armada-385-linksys.dtsi
|
||||
* Copyright (C) 2015 Imre Kaloz <kaloz@openwrt.org>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include "armada-385.dtsi"
|
||||
|
||||
/ {
|
||||
model = "ipTIME NAS1dual";
|
||||
compatible = "iptime,nas1dual", "marvell,armada385", "marvell,armada380";
|
||||
|
||||
aliases {
|
||||
led-boot = &led_ready;
|
||||
led-failsafe = &led_ready;
|
||||
led-running = &led_ready;
|
||||
led-upgrade = &led_ready;
|
||||
label-mac-device = ð0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200n8";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x80000000>; /* 2GB */
|
||||
};
|
||||
|
||||
soc {
|
||||
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
|
||||
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
|
||||
MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
|
||||
MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
|
||||
MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio_keys_pins>;
|
||||
|
||||
power {
|
||||
label = "Power Button";
|
||||
linux,input-type = <EV_SW>;
|
||||
linux,code = <KEY_POWER>;
|
||||
gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
reset {
|
||||
label = "Reset Button";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
copy {
|
||||
label = "USB Copy Button";
|
||||
linux,code = <KEY_COPY>;
|
||||
gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio-leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio_leds_pins>;
|
||||
|
||||
led_ready: ready {
|
||||
label = "blue:ready";
|
||||
gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
hdd {
|
||||
label = "blue:hdd";
|
||||
gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "disk-activity";
|
||||
};
|
||||
|
||||
usb {
|
||||
function = LED_FUNCTION_USB;
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>;
|
||||
trigger-sources = <&usb3_0_port1 &usb3_0_port2>;
|
||||
linux,default-trigger = "usbport";
|
||||
};
|
||||
};
|
||||
|
||||
gpio-fan {
|
||||
compatible = "gpio-fan";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio_fan_pins>;
|
||||
gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>,
|
||||
<&gpio1 18 GPIO_ACTIVE_HIGH>;
|
||||
/* We don't know the exact rpm, just use dummy values here. */
|
||||
gpio-fan,speed-map = <0 0>, <1 1>, <2 2>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
gpio-poweroff {
|
||||
compatible = "gpio-poweroff";
|
||||
gpios = <&pca9536 1 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
regulators {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sata_power_pins>;
|
||||
|
||||
reg_sata_power: regulator@1 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <1>;
|
||||
regulator-name = "sata-power";
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&ahci0 {
|
||||
status = "okay";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
sata-port@0 {
|
||||
reg = <0>;
|
||||
target-supply = <®_sata_power>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&bm {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bm_bppi {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ð0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ge0_rgmii_pins>;
|
||||
status = "okay";
|
||||
phy-handle = <ðphy1>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
buffer-manager = <&bm>;
|
||||
bm,pool-long = <0>;
|
||||
bm,pool-short = <1>;
|
||||
nvmem-cells = <&macaddr_uboot_fffa8>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
ð1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ge1_rgmii_pins>;
|
||||
status = "okay";
|
||||
phy-handle = <ðphy0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
buffer-manager = <&bm>;
|
||||
bm,pool-long = <2>;
|
||||
bm,pool-short = <3>;
|
||||
nvmem-cells = <&macaddr_uboot_fffa8>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
status = "okay";
|
||||
|
||||
pca9536: gpio@41 {
|
||||
compatible = "nxp,pca9536";
|
||||
reg = <0x41>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-line-names = "power-led", "power-board";
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mdio_pins>;
|
||||
|
||||
/* LED1: On - Link, Blink - Activity, Off - No Link */
|
||||
|
||||
ethphy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
marvell,reg-init = <3 16 0 0x1017>;
|
||||
};
|
||||
|
||||
ethphy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
marvell,reg-init = <3 16 0 0x1017>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
gpio_keys_pins: gpio-keys-pins {
|
||||
marvell,pins = "mpp24", "mpp26", "mpp48";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
gpio_leds_pins: gpio-leds-pins {
|
||||
marvell,pins = "mpp18", "mpp20", "mpp51";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
gpio_fan_pins: gpio-fan-pins {
|
||||
marvell,pins = "mpp25", "mpp50";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
sata_power_pins: sata-power-pins {
|
||||
marvell,pins = "mpp52";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
uart1_pins_alt: uart-pins-1-alt {
|
||||
marvell,pins = "mpp45", "mpp46";
|
||||
marvell,function = "ua1";
|
||||
};
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi1_pins>;
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <40000000>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
reg = <0x00000000 0x00100000>;
|
||||
label = "u-boot";
|
||||
read-only;
|
||||
|
||||
nvmem-layout {
|
||||
compatible = "fixed-layout";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
macaddr_uboot_fffa8: macaddr@fffa8 {
|
||||
reg = <0xfffa8 0x6>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
reg = <0x00100000 0x03ec0000>;
|
||||
label = "firmware";
|
||||
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
reg = <0x00000000 0x00600000>;
|
||||
label = "kernel";
|
||||
};
|
||||
|
||||
partition@600000 {
|
||||
reg = <0x00600000 0x038c0000>;
|
||||
label = "rootfs";
|
||||
};
|
||||
};
|
||||
|
||||
partition@3fc0000 {
|
||||
reg = <0x03fc0000 0x00040000>;
|
||||
label = "config";
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1_pins_alt>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_0 {
|
||||
status = "okay";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
usb3_0_port1: port@1 {
|
||||
reg = <1>;
|
||||
#trigger-source-cells = <0>;
|
||||
};
|
||||
|
||||
usb3_0_port2: port@2 {
|
||||
reg = <2>;
|
||||
#trigger-source-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,368 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Device Tree file for Western Digital My Cloud Mirror Gen 2
|
||||
* (BWVZ/Grand Teton)
|
||||
*
|
||||
* Copyright (C) 2020
|
||||
*
|
||||
* Based on the code from:
|
||||
*
|
||||
* Copyright (C) 2019 Evgeny Kolesnikov <evgenyz@gmail.com>
|
||||
* Copyright (C) 2016 Martin Mueller <mm@sig21.net>
|
||||
* Copyright (C) 2013 Gregory CLEMENT <gregory.clement@free-electrons.com>
|
||||
* Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
|
||||
*
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include "armada-385.dtsi"
|
||||
|
||||
/ {
|
||||
model = "WD MyCloud Mirror Gen 2 (BWVZ/Grand Teton)";
|
||||
compatible = "wd,cloud-mirror-gen2", "marvell,armada385", "marvell,armada380";
|
||||
|
||||
aliases {
|
||||
led-boot = &led_boot;
|
||||
led-failsafe = &led_boot;
|
||||
led-upgrade = &led_boot;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
append-rootblock = "nullparameter="; /* override the bootloader args */
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
|
||||
soc {
|
||||
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
|
||||
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
|
||||
MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
|
||||
MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
|
||||
MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
|
||||
|
||||
internal-regs {
|
||||
timer@c200 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
i2c0: i2c@11000 {
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
i2c1: i2c@11100 {
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
serial@12000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Connected to Welltrend 6703F-OG240WT MCU
|
||||
* which controls power, fan and other things
|
||||
*/
|
||||
serial@12100 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pinctrl@18000 {
|
||||
/* use only one pin for UART1, as mpp20 is used by sata0 */
|
||||
uart1_pins: uart-pins-1 {
|
||||
marvell,pins = "mpp19";
|
||||
marvell,function = "ua1";
|
||||
};
|
||||
|
||||
xhci0_vbus_pins: xhci0-vbus-pins {
|
||||
marvell,pins = "mpp26";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
xhci1_vbus_pins: xhci1-vbus-pins {
|
||||
marvell,pins = "mpp27";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
sata0_pins: sata-pins-0 {
|
||||
marvell,pins = "mpp55";
|
||||
marvell,function = "sata0";
|
||||
};
|
||||
|
||||
sata1_pins: sata-pins-1 {
|
||||
marvell,pins = "mpp56";
|
||||
marvell,function = "sata1";
|
||||
};
|
||||
|
||||
sata_leds: sata-leds {
|
||||
marvell,pins = "mpp43", "mpp52", "mpp53", "mpp54";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
btn_pins: btn-pins {
|
||||
marvell,pins = "mpp50";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
usb@58000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
phy: mdio@72004 {
|
||||
phy0: ethernet-phy@0 {
|
||||
/* Init ETH LEDs */
|
||||
marvell,reg-init = <3 16 0 0x101e>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
sata@a8000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
nand-controller@d0000 {
|
||||
status = "okay";
|
||||
|
||||
nand: nand@0 {
|
||||
reg = <0>;
|
||||
label = "pxa3xx_nand-0";
|
||||
nand-rb = <0>;
|
||||
marvell,nand-keep-config;
|
||||
#marvell,nand-enable-arbiter; //optional
|
||||
nand-on-flash-bbt;
|
||||
nand-ecc-strength = <4>;
|
||||
nand-ecc-step-size = <512>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@00000000 {
|
||||
label = "U-Boot";
|
||||
reg = <0x00000000 0x00500000>; /* 5 MB */
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@00500000 {
|
||||
label = "kernel";
|
||||
reg = <0x00500000 0x00500000>; /* 5 MB */
|
||||
};
|
||||
|
||||
partition@00a00000 {
|
||||
label = "uRamdisk";
|
||||
reg = <0x00a00000 0x00500000>; /* 5 MB */
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@00f00000 {
|
||||
label = "ubi";
|
||||
reg = <0x00f00000 0x0b900000>; /* 185 MB */
|
||||
};
|
||||
|
||||
partition@c800000 {
|
||||
label = "rescue fw";
|
||||
reg = <0x0c800000 0x00f00000>; /* 15 MB */
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@d70000 {
|
||||
label = "config";
|
||||
reg = <0x0d700000 0x01400000>; /* 20 MB */
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@eb00000 {
|
||||
label = "reserve1";
|
||||
reg = <0x0eb00000 0x00a00000>; /* 10 MB */
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@f500000 {
|
||||
label = "reserve2";
|
||||
reg = <0x0f500000 0x00a00000>; /* 10 MB */
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
usb3@f0000 {
|
||||
usb-phy = <&usb3_0_phy>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb3@f8000 {
|
||||
usb-phy = <&usb3_1_phy>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpio-leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sata_leds>;
|
||||
|
||||
led_boot: s1red {
|
||||
label = "red:hdd1";
|
||||
gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
s2red {
|
||||
label = "red:hdd2";
|
||||
gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
s1blue {
|
||||
label = "blue:hdd1";
|
||||
gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "ata1";
|
||||
};
|
||||
s2blue {
|
||||
label = "blue:hdd2";
|
||||
gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "ata2";
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&btn_pins>;
|
||||
|
||||
reset {
|
||||
label = "reset";
|
||||
linux,code = <KEY_RESTART>; // Restart=0x198, Power=0x116
|
||||
gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
|
||||
debounce-interval = <60>;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
usb3_0_phy: usb3_0_phy {
|
||||
compatible = "usb-nop-xceiv";
|
||||
vcc-supply = <®_usb3_0_vbus>;
|
||||
};
|
||||
|
||||
usb3_1_phy: usb3_1_phy {
|
||||
compatible = "usb-nop-xceiv";
|
||||
vcc-supply = <®_usb3_1_vbus>;
|
||||
};
|
||||
|
||||
reg_usb3_0_vbus: usb3-vbus0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb3-vbus0";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&xhci0_vbus_pins>;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
gpio = <&gpio0 26 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
reg_usb3_1_vbus: usb3-vbus1 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb3-vbus1";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&xhci1_vbus_pins>;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
gpio = <&gpio0 27 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
reg_sata0: pwr-sata0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "pwr_en_sata0";
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
enable-active-high;
|
||||
regulator-boot-on;
|
||||
gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
reg_5v_sata0: v5-sata0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "v5.0-sata0";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
vin-supply = <®_sata0>;
|
||||
};
|
||||
|
||||
reg_12v_sata0: v12-sata0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "v12.0-sata0";
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
vin-supply = <®_sata0>;
|
||||
};
|
||||
|
||||
reg_sata1: pwr-sata1 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "pwr_en_sata1";
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
enable-active-high;
|
||||
regulator-boot-on;
|
||||
gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
reg_5v_sata1: v5-sata1 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "v5.0-sata1";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
vin-supply = <®_sata1>;
|
||||
};
|
||||
|
||||
reg_12v_sata1: v12-sata1 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "v12.0-sata1";
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
vin-supply = <®_sata1>;
|
||||
};
|
||||
};
|
||||
|
||||
&bm {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&bm_bppi {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ð2 {
|
||||
status = "okay";
|
||||
phy = <&phy0>;
|
||||
phy-mode = "sgmii";
|
||||
buffer-manager = <&bm>;
|
||||
bm,pool-long = <0>;
|
||||
bm,pool-short = <1>;
|
||||
};
|
||||
|
||||
&ahci0 {
|
||||
status = "okay";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
sata-port@0 {
|
||||
reg = <0>;
|
||||
target-supply = <®_sata0>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
|
||||
sata-port@1 {
|
||||
reg = <1>;
|
||||
target-supply = <®_sata1>;
|
||||
#thermal-sensor-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,66 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "armada-3720-uDPU.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Methode eDPU Board";
|
||||
compatible = "methode,edpu", "marvell,armada3720", "marvell,armada3710";
|
||||
};
|
||||
|
||||
/* PHY mode is set to 1000Base-X despite Maxlinear IC being capable of
|
||||
* 2500Base-X since until 5.15 support for mvebu is available trying to
|
||||
* use 2500Base-X will cause buffer overruns for which the fix is not
|
||||
* easily backportable.
|
||||
*/
|
||||
ð0 {
|
||||
phy-mode = "1000base-x";
|
||||
};
|
||||
|
||||
/*
|
||||
* External MV88E6361 switch is only available on v2 of the board.
|
||||
* U-Boot will enable the MDIO bus and switch nodes.
|
||||
*/
|
||||
&mdio {
|
||||
status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&smi_pins>;
|
||||
|
||||
/* Actual device is MV88E6361 */
|
||||
switch: switch@0 {
|
||||
compatible = "marvell,mv88e6190";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
status = "disabled";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "cpu";
|
||||
phy-mode = "2500base-x";
|
||||
managed = "in-band-status";
|
||||
ethernet = <ð0>;
|
||||
};
|
||||
|
||||
port@9 {
|
||||
reg = <9>;
|
||||
label = "downlink";
|
||||
phy-mode = "2500base-x";
|
||||
managed = "in-band-status";
|
||||
};
|
||||
|
||||
port@a {
|
||||
reg = <10>;
|
||||
label = "uplink";
|
||||
phy-mode = "2500base-x";
|
||||
managed = "in-band-status";
|
||||
sfp = <&sfp_eth1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,240 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Device Tree file for ESPRESSObin-Ultra
|
||||
* Copyright (C) 2019 Globalscale technologies, Inc.
|
||||
*
|
||||
* Jason Hung <jhung@globalscaletechnologies.com>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include "armada-372x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Globalscale Marvell ESPRESSOBin Ultra Board";
|
||||
compatible = "globalscale,espressobin-ultra", "marvell,armada3720",
|
||||
"marvell,armada3710";
|
||||
|
||||
aliases {
|
||||
/* for dsa slave device */
|
||||
ethernet1 = &switch0port1;
|
||||
ethernet2 = &switch0port2;
|
||||
ethernet3 = &switch0port3;
|
||||
ethernet4 = &switch0port4;
|
||||
ethernet5 = &switch0port5;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
|
||||
};
|
||||
|
||||
reg_usb3_vbus: usb3-vbus {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb3-vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
enable-active-high;
|
||||
gpios = <&gpionb 19 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
usb3_phy: usb3-phy {
|
||||
compatible = "usb-nop-xceiv";
|
||||
vcc-supply = <®_usb3_vbus>;
|
||||
};
|
||||
|
||||
leds {
|
||||
pinctrl-names = "default";
|
||||
compatible = "gpio-leds";
|
||||
/* No assigned functions to the LEDs by default */
|
||||
led1 {
|
||||
label = "ebin-ultra:blue:led1";
|
||||
gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
led2 {
|
||||
label = "ebin-ultra:green:led2";
|
||||
gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
led3 {
|
||||
label = "ebin-ultra:red:led3";
|
||||
gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
led4 {
|
||||
label = "ebin-ultra:yellow:led4";
|
||||
gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pcie0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sata {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdhci0 {
|
||||
status = "okay";
|
||||
non-removable;
|
||||
bus-width = <8>;
|
||||
mmc-ddr-1_8v;
|
||||
mmc-hs400-1_8v;
|
||||
marvell,pad-type = "fixed-1-8v";
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi_quad_pins>;
|
||||
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <108000000>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-tx-bus-width = <4>;
|
||||
m25p,fast-read;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "firmware";
|
||||
reg = <0x0 0x3e0000>;
|
||||
};
|
||||
partition@3e0000 {
|
||||
label = "hw-info";
|
||||
reg = <0x3e0000 0x10000>;
|
||||
read-only;
|
||||
};
|
||||
partition@3f0000 {
|
||||
label = "u-boot-env";
|
||||
reg = <0x3f0000 0x10000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1_pins>;
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
|
||||
clock-frequency = <100000>;
|
||||
|
||||
rtc@51 {
|
||||
compatible = "nxp,pcf8563";
|
||||
reg = <0x51>;
|
||||
};
|
||||
};
|
||||
|
||||
&usb3 {
|
||||
status = "okay";
|
||||
usb-phy = <&usb3_phy>;
|
||||
};
|
||||
|
||||
&usb2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ð0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&rgmii_pins>;
|
||||
phy-mode = "rgmii-id";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
status = "okay";
|
||||
|
||||
extphy: ethernet-phy@0 {
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
switch0: switch0@1 {
|
||||
compatible = "marvell,mv88e6085";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <3>;
|
||||
|
||||
dsa,member = <0 0>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
switch0port0: port@0 {
|
||||
reg = <0>;
|
||||
ethernet = <ð0>;
|
||||
};
|
||||
|
||||
switch0port1: port@1 {
|
||||
reg = <1>;
|
||||
label = "lan0";
|
||||
phy-handle = <&switch0phy1>;
|
||||
};
|
||||
|
||||
switch0port2: port@2 {
|
||||
reg = <2>;
|
||||
label = "lan1";
|
||||
phy-handle = <&switch0phy2>;
|
||||
};
|
||||
|
||||
switch0port3: port@3 {
|
||||
reg = <3>;
|
||||
label = "lan2";
|
||||
phy-handle = <&switch0phy3>;
|
||||
};
|
||||
|
||||
switch0port4: port@4 {
|
||||
reg = <4>;
|
||||
label = "lan3";
|
||||
phy-handle = <&switch0phy4>;
|
||||
};
|
||||
|
||||
switch0port5: port@5 {
|
||||
reg = <5>;
|
||||
label = "wan";
|
||||
phy-handle = <&extphy>;
|
||||
phy-mode = "sgmii";
|
||||
};
|
||||
};
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
switch0phy1: switch0phy1@11 {
|
||||
reg = <0x11>;
|
||||
};
|
||||
switch0phy2: switch0phy2@12 {
|
||||
reg = <0x12>;
|
||||
};
|
||||
switch0phy3: switch0phy3@13 {
|
||||
reg = <0x13>;
|
||||
};
|
||||
switch0phy4: switch0phy4@14 {
|
||||
reg = <0x14>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,249 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
|
||||
|
||||
/dts-v1/;
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include "armada-372x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "GL.iNet GL-MV1000";
|
||||
compatible = "glinet,gl-mv1000", "marvell,armada3720";
|
||||
|
||||
aliases {
|
||||
led-boot = &led_power;
|
||||
led-failsafe = &led_power;
|
||||
led-running = &led_power;
|
||||
led-upgrade = &led_power;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
|
||||
};
|
||||
|
||||
vcc_sd_reg1: regulator {
|
||||
compatible = "regulator-gpio";
|
||||
regulator-name = "vcc_sd1";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
|
||||
gpios-states = <0>;
|
||||
states = <1800000 0x1
|
||||
3300000 0x0>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
reset {
|
||||
label = "reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
switch {
|
||||
label = "switch";
|
||||
linux,code = <BTN_0>;
|
||||
gpios = <&gpiosb 22 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
vpn {
|
||||
label = "green:vpn";
|
||||
gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
wan {
|
||||
function = LED_FUNCTION_WAN;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
led_power: power {
|
||||
function = LED_FUNCTION_POWER;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;
|
||||
default-state = "on";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
reg = <0>;
|
||||
compatible = "jedec,spi-nor";
|
||||
spi-max-frequency = <104000000>;
|
||||
m25p,fast-read;
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "u-boot";
|
||||
reg = <0 0xf0000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@f0000 {
|
||||
label = "u-boot-env";
|
||||
reg = <0xf0000 0x8000>;
|
||||
};
|
||||
|
||||
factory: partition@f8000 {
|
||||
label = "factory";
|
||||
reg = <0xf8000 0x8000>;
|
||||
read-only;
|
||||
|
||||
nvmem-layout {
|
||||
compatible = "fixed-layout";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
macaddr_factory_0: macaddr@0 {
|
||||
reg = <0x0 0x6>;
|
||||
};
|
||||
|
||||
macaddr_factory_6: macaddr@6 {
|
||||
reg = <0x6 0x6>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
label = "gl-firmware-dtb";
|
||||
reg = <0x100000 0x10000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@110000 {
|
||||
label = "gl-firmware";
|
||||
reg = <0x110000 0xef0000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@ef0000 {
|
||||
label = "gl-firmware-jffs2";
|
||||
reg = <0xef0000 0x110000>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&sdhci1 {
|
||||
wp-inverted;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpionb 17 GPIO_ACTIVE_LOW>;
|
||||
marvell,pad-type = "sd";
|
||||
no-1-8-v;
|
||||
vqmmc-supply = <&vcc_sd_reg1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdhci0 {
|
||||
bus-width = <8>;
|
||||
mmc-ddr-1_8v;
|
||||
mmc-hs400-1_8v;
|
||||
non-removable;
|
||||
no-sd;
|
||||
no-sdio;
|
||||
marvell,pad-type = "fixed-1-8v";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mdio {
|
||||
switch0: switch0@1 {
|
||||
compatible = "marvell,mv88e6085";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
|
||||
dsa,member = <0 0>;
|
||||
|
||||
ports: ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
ethernet = <ð0>;
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "wan";
|
||||
phy-handle = <&switch0phy0>;
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan0";
|
||||
phy-handle = <&switch0phy1>;
|
||||
|
||||
nvmem-cells = <&macaddr_factory_6>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan1";
|
||||
phy-handle = <&switch0phy2>;
|
||||
|
||||
nvmem-cells = <&macaddr_factory_6>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
};
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
switch0phy0: switch0phy0@11 {
|
||||
reg = <0x11>;
|
||||
};
|
||||
switch0phy1: switch0phy1@12 {
|
||||
reg = <0x12>;
|
||||
};
|
||||
switch0phy2: switch0phy2@13 {
|
||||
reg = <0x13>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ð0 {
|
||||
nvmem-cells = <&macaddr_factory_0>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
phy-mode = "rgmii-id";
|
||||
status = "okay";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,46 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "armada-3720-uDPU.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Methode uDPU Board";
|
||||
compatible = "methode,udpu", "marvell,armada3720", "marvell,armada3710";
|
||||
|
||||
sfp_eth0: sfp-eth0 {
|
||||
compatible = "sff,sfp";
|
||||
i2c-bus = <&i2c0>;
|
||||
los-gpio = <&gpiosb 2 GPIO_ACTIVE_HIGH>;
|
||||
mod-def0-gpio = <&gpiosb 3 GPIO_ACTIVE_LOW>;
|
||||
tx-disable-gpio = <&gpiosb 4 GPIO_ACTIVE_HIGH>;
|
||||
tx-fault-gpio = <&gpiosb 5 GPIO_ACTIVE_HIGH>;
|
||||
maximum-power-milliwatt = <3000>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl_nb {
|
||||
i2c1_recovery_pins: i2c1-recovery-pins {
|
||||
groups = "i2c1";
|
||||
function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "recovery";
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
pinctrl-1 = <&i2c1_recovery_pins>;
|
||||
/delete-property/mrvl,i2c-fast-mode;
|
||||
scl-gpios = <&gpionb 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
sda-gpios = <&gpionb 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
};
|
||||
|
||||
ð0 {
|
||||
phy-mode = "2500base-x";
|
||||
sfp = <&sfp_eth0>;
|
||||
};
|
||||
|
||||
ð1 {
|
||||
phy-mode = "2500base-x";
|
||||
};
|
||||
|
|
@ -1,165 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Device tree for the uDPU board.
|
||||
* Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
|
||||
* Copyright (C) 2016 Marvell
|
||||
* Copyright (C) 2019 Methode Electronics
|
||||
* Copyright (C) 2019 Telus
|
||||
*
|
||||
* Vladimir Vid <vladimir.vid@sartura.hr>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include "armada-372x.dtsi"
|
||||
|
||||
/ {
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
|
||||
};
|
||||
|
||||
aliases {
|
||||
ethernet0 = ð0;
|
||||
ethernet1 = ð1;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led-power1 {
|
||||
label = "udpu:green:power";
|
||||
gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
led-power2 {
|
||||
label = "udpu:red:power";
|
||||
gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
led-network1 {
|
||||
label = "udpu:green:network";
|
||||
gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
led-network2 {
|
||||
label = "udpu:red:network";
|
||||
gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
led-alarm1 {
|
||||
label = "udpu:green:alarm";
|
||||
gpios = <&gpionb 15 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
led-alarm2 {
|
||||
label = "udpu:red:alarm";
|
||||
gpios = <&gpionb 16 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
sfp_eth1: sfp-eth1 {
|
||||
compatible = "sff,sfp";
|
||||
i2c-bus = <&i2c1>;
|
||||
los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>;
|
||||
mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>;
|
||||
tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>;
|
||||
tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>;
|
||||
maximum-power-milliwatt = <3000>;
|
||||
};
|
||||
};
|
||||
|
||||
&sdhci0 {
|
||||
status = "okay";
|
||||
bus-width = <8>;
|
||||
mmc-ddr-1_8v;
|
||||
mmc-hs400-1_8v;
|
||||
marvell,pad-type = "fixed-1-8v";
|
||||
non-removable;
|
||||
no-sd;
|
||||
no-sdio;
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi_quad_pins>;
|
||||
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <54000000>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "firmware";
|
||||
reg = <0x0 0x180000>;
|
||||
};
|
||||
|
||||
partition@180000 {
|
||||
label = "u-boot-env";
|
||||
reg = <0x180000 0x10000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl_nb {
|
||||
i2c2_recovery_pins: i2c2-recovery-pins {
|
||||
groups = "i2c2";
|
||||
function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "recovery";
|
||||
pinctrl-0 = <&i2c2_pins>;
|
||||
pinctrl-1 = <&i2c2_recovery_pins>;
|
||||
/delete-property/mrvl,i2c-fast-mode;
|
||||
scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
|
||||
temp-sensor@48 {
|
||||
compatible = "ti,tmp75c";
|
||||
reg = <0x48>;
|
||||
};
|
||||
|
||||
temp-sensor@49 {
|
||||
compatible = "ti,tmp75c";
|
||||
reg = <0x49>;
|
||||
};
|
||||
};
|
||||
|
||||
ð0 {
|
||||
status = "okay";
|
||||
managed = "in-band-status";
|
||||
phys = <&comphy1 0>;
|
||||
};
|
||||
|
||||
ð1 {
|
||||
phy-mode = "sgmii";
|
||||
status = "okay";
|
||||
managed = "in-band-status";
|
||||
phys = <&comphy0 1>;
|
||||
sfp = <&sfp_eth1>;
|
||||
};
|
||||
|
||||
&usb3 {
|
||||
status = "okay";
|
||||
phys = <&usb2_utmi_otg_phy>;
|
||||
phy-names = "usb2-utmi-otg-phy";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -1,448 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Device Tree file for Globalscale MOCHAbin
|
||||
* Copyright (C) 2019 Globalscale technologies, Inc.
|
||||
* Copyright (C) 2021 Sartura Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include "armada-7040.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Globalscale MOCHAbin";
|
||||
compatible = "globalscale,mochabin", "marvell,armada7040",
|
||||
"marvell,armada-ap806-quad", "marvell,armada-ap806";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
aliases {
|
||||
ethernet0 = &cp0_eth0;
|
||||
ethernet1 = &cp0_eth1;
|
||||
ethernet2 = &cp0_eth2;
|
||||
ethernet3 = &swport1;
|
||||
ethernet4 = &swport2;
|
||||
ethernet5 = &swport3;
|
||||
ethernet6 = &swport4;
|
||||
};
|
||||
|
||||
/* SFP+ 10G */
|
||||
sfp_eth0: sfp-eth0 {
|
||||
compatible = "sff,sfp";
|
||||
i2c-bus = <&cp0_i2c1>;
|
||||
los-gpio = <&sfp_gpio 3 GPIO_ACTIVE_HIGH>;
|
||||
mod-def0-gpio = <&sfp_gpio 2 GPIO_ACTIVE_LOW>;
|
||||
tx-disable-gpio = <&sfp_gpio 1 GPIO_ACTIVE_HIGH>;
|
||||
tx-fault-gpio = <&sfp_gpio 0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
/* SFP 1G */
|
||||
sfp_eth2: sfp-eth2 {
|
||||
compatible = "sff,sfp";
|
||||
i2c-bus = <&cp0_i2c0>;
|
||||
los-gpio = <&sfp_gpio 7 GPIO_ACTIVE_HIGH>;
|
||||
mod-def0-gpio = <&sfp_gpio 6 GPIO_ACTIVE_LOW>;
|
||||
tx-disable-gpio = <&sfp_gpio 5 GPIO_ACTIVE_HIGH>;
|
||||
tx-fault-gpio = <&sfp_gpio 4 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
/* microUSB UART console */
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
/* eMMC */
|
||||
&ap_sdhci0 {
|
||||
status = "okay";
|
||||
|
||||
bus-width = <4>;
|
||||
non-removable;
|
||||
/delete-property/ marvell,xenon-phy-slow-mode;
|
||||
no-1-8-v;
|
||||
};
|
||||
|
||||
&cp0_pinctrl {
|
||||
cp0_uart0_pins: cp0-uart0-pins {
|
||||
marvell,pins = "mpp6", "mpp7";
|
||||
marvell,function = "uart0";
|
||||
};
|
||||
|
||||
cp0_spi0_pins: cp0-spi0-pins {
|
||||
marvell,pins = "mpp56", "mpp57", "mpp58", "mpp59";
|
||||
marvell,function = "spi0";
|
||||
};
|
||||
|
||||
cp0_spi1_pins: cp0-spi1-pins {
|
||||
marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
|
||||
marvell,function = "spi1";
|
||||
};
|
||||
|
||||
cp0_i2c0_pins: cp0-i2c0-pins {
|
||||
marvell,pins = "mpp37", "mpp38";
|
||||
marvell,function = "i2c0";
|
||||
};
|
||||
|
||||
cp0_i2c1_pins: cp0-i2c1-pins {
|
||||
marvell,pins = "mpp2", "mpp3";
|
||||
marvell,function = "i2c1";
|
||||
};
|
||||
|
||||
pca9554_int_pins: pca9554-int-pins {
|
||||
marvell,pins = "mpp27";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
cp0_rgmii1_pins: cp0-rgmii1-pins {
|
||||
marvell,pins = "mpp44", "mpp45", "mpp46", "mpp47", "mpp48", "mpp49",
|
||||
"mpp50", "mpp51", "mpp52", "mpp53", "mpp54", "mpp55";
|
||||
marvell,function = "ge1";
|
||||
};
|
||||
|
||||
is31_sdb_pins: is31-sdb-pins {
|
||||
marvell,pins = "mpp30";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
cp0_pcie_reset_pins: cp0-pcie-reset-pins {
|
||||
marvell,pins = "mpp9";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
cp0_switch_pins: cp0-switch-pins {
|
||||
marvell,pins = "mpp0", "mpp1";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
cp0_phy_pins: cp0-phy-pins {
|
||||
marvell,pins = "mpp12";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
/* mikroBUS UART */
|
||||
&cp0_uart0 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_uart0_pins>;
|
||||
};
|
||||
|
||||
/* mikroBUS SPI */
|
||||
&cp0_spi0 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_spi0_pins>;
|
||||
};
|
||||
|
||||
/* SPI-NOR */
|
||||
&cp0_spi1{
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_spi1_pins>;
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <20000000>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "u-boot";
|
||||
reg = <0x0 0x3e0000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@3e0000 {
|
||||
label = "hw-info";
|
||||
reg = <0x3e0000 0x10000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@3f0000 {
|
||||
label = "u-boot-env";
|
||||
reg = <0x3f0000 0x10000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* mikroBUS, 1G SFP and GPIO expander */
|
||||
&cp0_i2c0 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_i2c0_pins>;
|
||||
clock-frequency = <100000>;
|
||||
|
||||
sfp_gpio: pca9554@39 {
|
||||
compatible = "nxp,pca9554";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pca9554_int_pins>;
|
||||
reg = <0x39>;
|
||||
|
||||
interrupt-parent = <&cp0_gpio1>;
|
||||
interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
/*
|
||||
* IO0_0: SFP+_TX_FAULT
|
||||
* IO0_1: SFP+_TX_DISABLE
|
||||
* IO0_2: SFP+_PRSNT
|
||||
* IO0_3: SFP+_LOSS
|
||||
* IO0_4: SFP_TX_FAULT
|
||||
* IO0_5: SFP_TX_DISABLE
|
||||
* IO0_6: SFP_PRSNT
|
||||
* IO0_7: SFP_LOSS
|
||||
*/
|
||||
};
|
||||
};
|
||||
|
||||
/* IS31FL3199, mini-PCIe and 10G SFP+ */
|
||||
&cp0_i2c1 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_i2c1_pins>;
|
||||
clock-frequency = <100000>;
|
||||
|
||||
leds@64 {
|
||||
compatible = "issi,is31fl3199";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&is31_sdb_pins>;
|
||||
shutdown-gpios = <&cp0_gpio1 30 GPIO_ACTIVE_HIGH>;
|
||||
reg = <0x64>;
|
||||
|
||||
led1_red: led@1 {
|
||||
label = "red:led1";
|
||||
reg = <1>;
|
||||
led-max-microamp = <20000>;
|
||||
};
|
||||
|
||||
led1_green: led@2 {
|
||||
label = "green:led1";
|
||||
reg = <2>;
|
||||
};
|
||||
|
||||
led1_blue: led@3 {
|
||||
label = "blue:led1";
|
||||
reg = <3>;
|
||||
};
|
||||
|
||||
led2_red: led@4 {
|
||||
label = "red:led2";
|
||||
reg = <4>;
|
||||
};
|
||||
|
||||
led2_green: led@5 {
|
||||
label = "green:led2";
|
||||
reg = <5>;
|
||||
};
|
||||
|
||||
led2_blue: led@6 {
|
||||
label = "blue:led2";
|
||||
reg = <6>;
|
||||
};
|
||||
|
||||
led3_red: led@7 {
|
||||
label = "red:led3";
|
||||
reg = <7>;
|
||||
};
|
||||
|
||||
led3_green: led@8 {
|
||||
label = "green:led3";
|
||||
reg = <8>;
|
||||
};
|
||||
|
||||
led3_blue: led@9 {
|
||||
label = "blue:led3";
|
||||
reg = <9>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_mdio {
|
||||
status = "okay";
|
||||
|
||||
/* 88E1512 PHY */
|
||||
eth2phy: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
sfp = <&sfp_eth2>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_phy_pins>;
|
||||
reset-gpios = <&cp0_gpio1 12 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
/* 88E6141 Topaz switch */
|
||||
switch: switch@3 {
|
||||
compatible = "marvell,mv88e6085";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <3>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_switch_pins>;
|
||||
reset-gpios = <&cp0_gpio1 0 GPIO_ACTIVE_LOW>;
|
||||
|
||||
interrupt-parent = <&cp0_gpio1>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
swport1: port@1 {
|
||||
reg = <1>;
|
||||
label = "lan0";
|
||||
phy-handle = <&swphy1>;
|
||||
};
|
||||
|
||||
swport2: port@2 {
|
||||
reg = <2>;
|
||||
label = "lan1";
|
||||
phy-handle = <&swphy2>;
|
||||
};
|
||||
|
||||
swport3: port@3 {
|
||||
reg = <3>;
|
||||
label = "lan2";
|
||||
phy-handle = <&swphy3>;
|
||||
};
|
||||
|
||||
swport4: port@4 {
|
||||
reg = <4>;
|
||||
label = "lan3";
|
||||
phy-handle = <&swphy4>;
|
||||
};
|
||||
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
ethernet = <&cp0_eth1>;
|
||||
phy-mode = "2500base-x";
|
||||
managed = "in-band-status";
|
||||
};
|
||||
};
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
swphy1: swphy1@17 {
|
||||
reg = <17>;
|
||||
};
|
||||
|
||||
swphy2: swphy2@18 {
|
||||
reg = <18>;
|
||||
};
|
||||
|
||||
swphy3: swphy3@19 {
|
||||
reg = <19>;
|
||||
};
|
||||
|
||||
swphy4: swphy4@20 {
|
||||
reg = <20>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_ethernet {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* 10G SFP+ */
|
||||
&cp0_eth0 {
|
||||
status = "okay";
|
||||
|
||||
phy-mode = "10gbase-r";
|
||||
phys = <&cp0_comphy4 0>;
|
||||
managed = "in-band-status";
|
||||
sfp = <&sfp_eth0>;
|
||||
};
|
||||
|
||||
/* Topaz switch uplink */
|
||||
&cp0_eth1 {
|
||||
status = "okay";
|
||||
|
||||
phy-mode = "2500base-x";
|
||||
phys = <&cp0_comphy0 1>;
|
||||
|
||||
fixed-link {
|
||||
speed = <2500>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
/* 1G SFP or 1G RJ45 */
|
||||
&cp0_eth2 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_rgmii1_pins>;
|
||||
|
||||
phy = <ð2phy>;
|
||||
phy-mode = "rgmii-id";
|
||||
};
|
||||
|
||||
/* SMSC USB5434B hub */
|
||||
&cp0_usb3_0 {
|
||||
status = "okay";
|
||||
|
||||
phys = <&cp0_comphy1 0>;
|
||||
phy-names = "cp0-usb3h0-comphy";
|
||||
};
|
||||
|
||||
/* miniPCI-E USB */
|
||||
&cp0_usb3_1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_sata0 {
|
||||
status = "okay";
|
||||
|
||||
/* 7 + 12 SATA connector (J24) */
|
||||
sata-port@0 {
|
||||
phys = <&cp0_comphy2 0>;
|
||||
phy-names = "cp0-sata0-0-phy";
|
||||
};
|
||||
|
||||
/* M.2-2250 B-key (J39) */
|
||||
sata-port@1 {
|
||||
phys = <&cp0_comphy3 1>;
|
||||
phy-names = "cp0-sata0-1-phy";
|
||||
};
|
||||
};
|
||||
|
||||
/* miniPCI-E (J5) */
|
||||
&cp0_pcie2 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_pcie_reset_pins>;
|
||||
phys = <&cp0_comphy5 2>;
|
||||
phy-names = "cp0-pcie2-x1-phy";
|
||||
reset-gpio = <&cp0_gpio1 9 GPIO_ACTIVE_LOW>;
|
||||
ranges = <0x82000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x8000000>;
|
||||
};
|
||||
|
|
@ -1,406 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "armada-7040.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
|
||||
/ {
|
||||
model = "MikroTik RB5009";
|
||||
compatible = "mikrotik,rb5009", "marvell,armada7040",
|
||||
"marvell,armada-ap806-quad", "marvell,armada-ap806";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x0 0x0 0x40000000>;
|
||||
};
|
||||
|
||||
aliases {
|
||||
led-boot = &led_user;
|
||||
led-failsafe = &led_user;
|
||||
led-running = &led_user;
|
||||
led-upgrade = &led_user;
|
||||
label-mac-device = &p1;
|
||||
};
|
||||
|
||||
usb3_vbus: regulator-usb3-vbus0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb3_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpio = <&cp0_gpio2 23 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
reg_leds: regulator-leds {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "LED-power";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
gpio = <&cp0_gpio2 27 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
output-led-power {
|
||||
compatible = "regulator-output";
|
||||
vout-supply = <®_leds>;
|
||||
};
|
||||
|
||||
sfp_i2c: sfp-i2c {
|
||||
compatible = "i2c-gpio";
|
||||
sda-gpios = <&cp0_gpio1 0 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
|
||||
scl-gpios = <&cp0_gpio1 1 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
|
||||
};
|
||||
|
||||
keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
reset {
|
||||
label = "reset";
|
||||
gpios = <&cp0_gpio1 28 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_RESTART>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led_user: user {
|
||||
function = "user";
|
||||
gpios = <&cp0_gpio2 26 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
};
|
||||
|
||||
sfp {
|
||||
function = "sfp";
|
||||
gpios = <&cp0_gpio2 25 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
};
|
||||
|
||||
hdr1 {
|
||||
function = "hdr1";
|
||||
gpios = <&cp0_gpio1 4 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
};
|
||||
|
||||
hdr2 {
|
||||
function = "hdr2";
|
||||
gpios = <&cp0_gpio2 19 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
};
|
||||
};
|
||||
|
||||
sfp: sfp {
|
||||
compatible = "sff,sfp";
|
||||
i2c-bus = <&sfp_i2c>;
|
||||
mod-def0-gpios = <&cp0_gpio1 11 GPIO_ACTIVE_LOW>;
|
||||
los-gpios = <&cp0_gpio1 2 GPIO_ACTIVE_HIGH>;
|
||||
tx-fault-gpios = <&cp0_gpio1 6 GPIO_ACTIVE_HIGH>;
|
||||
tx-disable-gpios = <&cp0_gpio1 5 GPIO_ACTIVE_HIGH>;
|
||||
rate-select0-gpios = <&cp0_gpio1 3 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <20000000>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
compatible = "mikrotik,routerboot-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
label = "MikroTik";
|
||||
reg = <0x0 0xfe0000>;
|
||||
|
||||
hard_config: hard_config {
|
||||
read-only;
|
||||
|
||||
nvmem-layout {
|
||||
compatible = "mikrotik,routerboot-nvmem";
|
||||
|
||||
macaddr_hard: base-mac-address {
|
||||
#nvmem-cell-cells = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
soft_config {
|
||||
};
|
||||
|
||||
dtb_config {
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
||||
partition@b0000 {
|
||||
label = "RouterBOOT-primary";
|
||||
reg = <0xb0000 0x10000>;
|
||||
};
|
||||
|
||||
/* Empty space on NOR repurposed for U-Boot environment */
|
||||
partition@fe0000 {
|
||||
label = "u-boot-env";
|
||||
reg = <0xfe0000 0x20000>;
|
||||
|
||||
nvmem-layout {
|
||||
compatible = "u-boot,env";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_nand_controller {
|
||||
status = "okay";
|
||||
|
||||
nand@0 {
|
||||
reg = <0>;
|
||||
nand-rb = <0>;
|
||||
nand-ecc-mode = "hw";
|
||||
nand-ecc-strength = <4>;
|
||||
nand-ecc-step-size = <512>;
|
||||
nand-on-flash-bbt;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "YAFFS";
|
||||
reg = <0x0 0x800000>;
|
||||
};
|
||||
|
||||
partition@800000 {
|
||||
label = "ubi";
|
||||
reg = <0x800000 0x3f800000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_utmi {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_comphy3 {
|
||||
connector {
|
||||
compatible = "usb-a-connector";
|
||||
phy-supply = <&usb3_vbus>;
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_usb3_1 {
|
||||
status = "okay";
|
||||
phys = <&cp0_comphy3 1>, <&cp0_utmi1>;
|
||||
phy-names = "cp0-usb3h1-comphy", "utmi";
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
&cp0_i2c0 {
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
&cp0_mdio {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_ethernet {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_eth0 {
|
||||
/* This port is connected to 88E6393X switch */
|
||||
status = "okay";
|
||||
phy-mode = "10gbase-r";
|
||||
phys = <&cp0_comphy2 0>;
|
||||
managed = "in-band-status";
|
||||
nvmem-cells = <&macaddr_hard 0>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
&cp0_mdio {
|
||||
status = "okay";
|
||||
|
||||
switch@0 {
|
||||
/* Actual device is MV88E6393X */
|
||||
compatible = "marvell,mv88e6190";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
/* LED config is lost if switch is reset */
|
||||
//reset-gpios = <&cp0_gpio2 2 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "cpu";
|
||||
ethernet = <&cp0_eth0>;
|
||||
phy-mode = "10gbase-r";
|
||||
managed = "in-band-status";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "p8";
|
||||
phy-handle = <&switch0phy1>;
|
||||
nvmem-cells = <&macaddr_hard 7>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "p7";
|
||||
phy-handle = <&switch0phy2>;
|
||||
nvmem-cells = <&macaddr_hard 6>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "p6";
|
||||
phy-handle = <&switch0phy3>;
|
||||
nvmem-cells = <&macaddr_hard 5>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
port@4 {
|
||||
reg = <4>;
|
||||
label = "p5";
|
||||
phy-handle = <&switch0phy4>;
|
||||
nvmem-cells = <&macaddr_hard 4>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
label = "p4";
|
||||
phy-handle = <&switch0phy5>;
|
||||
nvmem-cells = <&macaddr_hard 3>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
port@6 {
|
||||
reg = <6>;
|
||||
label = "p3";
|
||||
phy-handle = <&switch0phy6>;
|
||||
nvmem-cells = <&macaddr_hard 2>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
port@7 {
|
||||
reg = <7>;
|
||||
label = "p2";
|
||||
phy-handle = <&switch0phy7>;
|
||||
nvmem-cells = <&macaddr_hard 1>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
p1: port@9 {
|
||||
reg = <9>;
|
||||
label = "p1";
|
||||
phy-mode = "sgmii";
|
||||
phy-handle = <&qca8081>;
|
||||
managed = "in-band-status";
|
||||
nvmem-cells = <&macaddr_hard 0>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
port@a {
|
||||
reg = <10>;
|
||||
label = "sfp";
|
||||
phy-mode = "10gbase-r";
|
||||
managed = "in-band-status";
|
||||
sfp = <&sfp>;
|
||||
nvmem-cells = <&macaddr_hard 8>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
};
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
switch0phy1: switch0phy1@1 {
|
||||
reg = <0x1>;
|
||||
};
|
||||
|
||||
switch0phy2: switch0phy2@2 {
|
||||
reg = <0x2>;
|
||||
};
|
||||
|
||||
switch0phy3: switch0phy3@3 {
|
||||
reg = <0x3>;
|
||||
};
|
||||
|
||||
switch0phy4: switch0phy4@4 {
|
||||
reg = <0x4>;
|
||||
};
|
||||
|
||||
switch0phy5: switch0phy5@5 {
|
||||
reg = <0x5>;
|
||||
};
|
||||
|
||||
switch0phy6: switch0phy6@6 {
|
||||
reg = <0x6>;
|
||||
};
|
||||
|
||||
switch0phy7: switch0phy7@7 {
|
||||
reg = <0x7>;
|
||||
};
|
||||
};
|
||||
|
||||
mdio1 {
|
||||
compatible = "marvell,mv88e6xxx-mdio-external";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
qca8081: qca8081@0 {
|
||||
reg = <0>;
|
||||
|
||||
leds {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
led@1 {
|
||||
reg = <1>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_WAN;
|
||||
default-state = "keep";
|
||||
active-low;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,425 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include "armada-7040.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Check Point V-80";
|
||||
compatible = "checkpoint,v-80", "marvell,armada7040",
|
||||
"marvell,armada-ap806-quad", "marvell,armada-ap806";
|
||||
|
||||
aliases {
|
||||
ethernet0 = &cp0_eth0;
|
||||
ethernet1 = &cp0_eth1;
|
||||
mmc0 = &ap_sdhci0;
|
||||
mmc1 = &cp0_sdhci0;
|
||||
led-boot = &led_power_blue;
|
||||
led-failsafe = &led_power_red;
|
||||
led-running = &led_power_blue;
|
||||
led-upgrade = &led_power_blue;
|
||||
label-mac-device = &cp0_eth1;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
|
||||
};
|
||||
|
||||
keys {
|
||||
compatible = "gpio-keys";
|
||||
pinctrl-0 = <&pmx_gpio_keys_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
button-reset {
|
||||
label = "reset";
|
||||
gpios = <&cp0_gpio1 12 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_RESTART>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-0 = <&pmx_gpio_leds_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
/* populated but no hole on the case */
|
||||
led-0 {
|
||||
gpios = <&cp0_gpio1 13 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
function = LED_FUNCTION_WLAN;
|
||||
};
|
||||
|
||||
led_power_red: led-1 {
|
||||
gpios = <&cp0_gpio1 23 GPIO_ACTIVE_HIGH>;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = LED_FUNCTION_POWER;
|
||||
};
|
||||
|
||||
led-2 {
|
||||
gpios = <&cp0_gpio1 26 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
function = LED_FUNCTION_WAN_ONLINE;
|
||||
};
|
||||
|
||||
/* populated but no hole on the case */
|
||||
led-3 {
|
||||
gpios = <&cp0_gpio2 1 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = LED_FUNCTION_WLAN;
|
||||
};
|
||||
|
||||
led_power_blue: led-4 {
|
||||
gpios = <&cp0_gpio2 2 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
function = LED_FUNCTION_POWER;
|
||||
};
|
||||
|
||||
led-5 {
|
||||
gpios = <&cp0_gpio2 19 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = "management";
|
||||
};
|
||||
|
||||
led-6 {
|
||||
gpios = <&cp0_gpio2 20 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
function = "management";
|
||||
};
|
||||
|
||||
led-7 {
|
||||
gpios = <&cp0_gpio2 22 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = LED_FUNCTION_WAN_ONLINE;
|
||||
};
|
||||
};
|
||||
|
||||
regulator-usb-vbus {
|
||||
compatible = "regulator-fixed";
|
||||
pinctrl-0 = <&pmx_reg_usb_vbus_pins>;
|
||||
pinctrl-names = "default";
|
||||
regulator-name = "usb-vbus";
|
||||
gpios = <&cp0_gpio1 24 GPIO_ACTIVE_HIGH>;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
/* USB Type-C UART console */
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
/*
|
||||
* internal MicroSD slot
|
||||
* (Note: not populated on some HW versions)
|
||||
*/
|
||||
&ap_sdhci0 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-0 = <&pmx_ap_sdhci0_pins>;
|
||||
pinctrl-names = "default";
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&cp0_gpio1 6 GPIO_ACTIVE_LOW>;
|
||||
/*
|
||||
* Not stable in HS modes - phy needs "more calibration", so add
|
||||
* the "slow-mode" and disable SDR104, SDR50 and DDR50 modes.
|
||||
*/
|
||||
marvell,xenon-phy-slow-mode;
|
||||
no-1-8-v;
|
||||
};
|
||||
|
||||
&cp0_pinctrl {
|
||||
pinctrl-0 = <&pmx_board_id_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
pmx_ap_sdhci0_pins: ap-sdhci0-pins {
|
||||
marvell,pins = "mpp6";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_cp0_mdio_pins: cp0-mdio-pins {
|
||||
marvell,pins = "mpp27", "mpp28";
|
||||
marvell,function = "ge";
|
||||
};
|
||||
|
||||
pmx_cp0_spi1_pins: cp0-spi1-pins {
|
||||
marvell,pins = "mpp47", "mpp48", "mpp49", "mpp50";
|
||||
marvell,function = "spi1";
|
||||
};
|
||||
|
||||
pmx_cp0_i2c0_pins: cp0-i2c0-pins {
|
||||
marvell,pins = "mpp37", "mpp38";
|
||||
marvell,function = "i2c0";
|
||||
};
|
||||
|
||||
pmx_cp0_i2c1_pins: cp0-i2c1-pins {
|
||||
marvell,pins = "mpp2", "mpp3";
|
||||
marvell,function = "i2c1";
|
||||
};
|
||||
|
||||
pmx_cp0_sdhci0_pins: cp0-sdhci0-pins {
|
||||
marvell,pins = "mpp56", "mpp57", "mpp58", "mpp59", "mpp60", "mpp61";
|
||||
marvell,function = "sdio";
|
||||
};
|
||||
|
||||
pmx_gpio_keys_pins: gpio-keys-pins {
|
||||
marvell,pins = "mpp12";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_gpio_leds_pins: gpio-leds-pins {
|
||||
marvell,pins = "mpp13", "mpp23", "mpp26", "mpp33", "mpp34", "mpp51",
|
||||
"mpp52", "mpp54";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_reg_usb_vbus_pins: reg-usb-vbus-pins {
|
||||
marvell,pins = "mpp24";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_board_id_pins: board-id-pins {
|
||||
marvell,pins = "mpp4", "mpp10", "mpp62";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_eeprom_wp_pins: eeprom-wp-pins {
|
||||
marvell,pins = "mpp55";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_mdio {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-0 = <&pmx_cp0_mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
/* Marvell 88E6352 */
|
||||
switch@0 {
|
||||
compatible = "marvell,mv88e6085";
|
||||
reg = <0x0>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
swport0: port@0 {
|
||||
reg = <0x0>;
|
||||
label = "lan5";
|
||||
phy-handle = <&swphy0>;
|
||||
};
|
||||
|
||||
swport1: port@1 {
|
||||
reg = <0x1>;
|
||||
label = "lan4";
|
||||
phy-handle = <&swphy1>;
|
||||
};
|
||||
|
||||
swport2: port@2 {
|
||||
reg = <0x2>;
|
||||
label = "lan3";
|
||||
phy-handle = <&swphy2>;
|
||||
};
|
||||
|
||||
swport3: port@3 {
|
||||
reg = <0x3>;
|
||||
label = "lan2";
|
||||
phy-handle = <&swphy3>;
|
||||
};
|
||||
|
||||
swport4: port@4 {
|
||||
reg = <0x4>;
|
||||
label = "lan1";
|
||||
phy-handle = <&swphy4>;
|
||||
};
|
||||
|
||||
port@5 {
|
||||
reg = <0x5>;
|
||||
ethernet = <&cp0_eth0>;
|
||||
phy-connection-type = "sgmii";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
swphy0: switch-phy@0 {
|
||||
reg = <0x0>;
|
||||
};
|
||||
|
||||
swphy1: switch-phy@1 {
|
||||
reg = <0x1>;
|
||||
};
|
||||
|
||||
swphy2: switch-phy@2 {
|
||||
reg = <0x2>;
|
||||
};
|
||||
|
||||
swphy3: switch-phy@3 {
|
||||
reg = <0x3>;
|
||||
};
|
||||
|
||||
swphy4: switch-phy@4 {
|
||||
reg = <0x4>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* Marvell 88E1512 */
|
||||
ethphy1: ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-id0141,0dd1",
|
||||
"ethernet-phy-ieee802.3-c22";
|
||||
reg = <0x1>;
|
||||
/*
|
||||
* LED[0] (Green): LINK/ACT
|
||||
* LED[1] (Amber): SPEED 100/1000M
|
||||
*/
|
||||
marvell,reg-init = <3 16 0 0x61>;
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_ethernet {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* LAN1-5 (Switch) */
|
||||
&cp0_eth0 {
|
||||
status = "okay";
|
||||
|
||||
phy-connection-type = "sgmii";
|
||||
phys = <&cp0_comphy2 0>;
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
/* "WAN" */
|
||||
&cp0_eth1 {
|
||||
status = "okay";
|
||||
|
||||
phy-connection-type = "sgmii";
|
||||
phy-handle = <ðphy1>;
|
||||
phys = <&cp0_comphy0 1>;
|
||||
};
|
||||
|
||||
&cp0_gpio1 {
|
||||
board-id-1 {
|
||||
gpio-hog;
|
||||
gpios = <4 GPIO_ACTIVE_HIGH>;
|
||||
input;
|
||||
};
|
||||
|
||||
board-id-0 {
|
||||
gpio-hog;
|
||||
gpios = <10 GPIO_ACTIVE_HIGH>;
|
||||
input;
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_gpio2 {
|
||||
board-id-2 {
|
||||
gpio-hog;
|
||||
gpios = <30 GPIO_ACTIVE_HIGH>;
|
||||
input;
|
||||
};
|
||||
};
|
||||
|
||||
/* 2x NCT7802Y, EEPROM */
|
||||
&cp0_i2c0 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmx_cp0_i2c0_pins>;
|
||||
clock-frequency = <100000>;
|
||||
|
||||
hwmon@28 {
|
||||
compatible = "nuvoton,nct7802";
|
||||
reg = <0x28>;
|
||||
};
|
||||
|
||||
hwmon@29 {
|
||||
compatible = "nuvoton,nct7802";
|
||||
reg = <0x29>;
|
||||
};
|
||||
|
||||
/* Giantec GT24C04A */
|
||||
eeprom@54 {
|
||||
compatible = "atmel,24c04";
|
||||
pinctrl-0 = <&pmx_eeprom_wp_pins>;
|
||||
pinctrl-names = "default";
|
||||
reg = <0x54>;
|
||||
wp-gpios = <&cp0_gpio2 23 GPIO_ACTIVE_HIGH>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
||||
/* RTC */
|
||||
&cp0_i2c1 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmx_cp0_i2c1_pins>;
|
||||
clock-frequency = <100000>;
|
||||
|
||||
rtc@68 {
|
||||
compatible = "dallas,ds1337";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
/* eMMC */
|
||||
&cp0_sdhci0 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmx_cp0_sdhci0_pins>;
|
||||
bus-width = <4>;
|
||||
non-removable;
|
||||
};
|
||||
|
||||
/*
|
||||
* mPCIe slot
|
||||
* (Note: not populated on some HW versions)
|
||||
*/
|
||||
&cp0_pcie2 {
|
||||
status = "okay";
|
||||
|
||||
phys = <&cp0_comphy5 2>;
|
||||
phy-names = "cp0-pcie2-x1-phy";
|
||||
};
|
||||
|
||||
&cp0_utmi {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* USB 3.0 Type-A */
|
||||
&cp0_usb3_0 {
|
||||
status = "okay";
|
||||
|
||||
dr_mode = "host";
|
||||
phys = <&cp0_comphy1 0>, <&cp0_utmi0>;
|
||||
phy-names = "cp0-usb3h0-comphy", "utmi";
|
||||
};
|
||||
|
|
@ -1,514 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include "armada-8040.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Check Point V-81";
|
||||
compatible = "checkpoint,v-81", "marvell,armada8040",
|
||||
"marvell,armada-ap806-quad", "marvell,armada-ap806";
|
||||
|
||||
aliases {
|
||||
ethernet0 = &cp0_eth0;
|
||||
ethernet1 = &cp1_eth1;
|
||||
ethernet2 = &cp1_eth2;
|
||||
mmc0 = &ap_sdhci0;
|
||||
mmc1 = &cp0_sdhci0;
|
||||
led-boot = &led_power_blue;
|
||||
led-failsafe = &led_power_red;
|
||||
led-running = &led_power_blue;
|
||||
led-upgrade = &led_power_blue;
|
||||
label-mac-device = &cp1_eth2;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
|
||||
};
|
||||
|
||||
keys {
|
||||
compatible = "gpio-keys";
|
||||
pinctrl-0 = <&pmx_gpio_keys_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
button-reset {
|
||||
label = "reset";
|
||||
gpios = <&cp1_gpio1 31 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_RESTART>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-0 = <&pmx_gpio_leds_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
led-0 {
|
||||
gpios = <&cp1_gpio1 2 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = "management";
|
||||
};
|
||||
|
||||
led-1 {
|
||||
gpios = <&cp1_gpio1 3 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
function = "management";
|
||||
};
|
||||
|
||||
led-2 {
|
||||
gpios = <&cp1_gpio1 6 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = LED_FUNCTION_WAN_ONLINE;
|
||||
};
|
||||
|
||||
led-3 {
|
||||
gpios = <&cp1_gpio1 7 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
function = LED_FUNCTION_WAN_ONLINE;
|
||||
};
|
||||
|
||||
led_power_red: led-4 {
|
||||
gpios = <&cp1_gpio1 11 GPIO_ACTIVE_HIGH>;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = LED_FUNCTION_POWER;
|
||||
};
|
||||
|
||||
/* populated but no hole on the case ("LTE" or "DSL") */
|
||||
led-5 {
|
||||
gpios = <&cp1_gpio1 14 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
function = LED_FUNCTION_MOBILE;
|
||||
};
|
||||
|
||||
/* populated but no hole on the case ("LTE" or "DSL") */
|
||||
led-6 {
|
||||
gpios = <&cp1_gpio1 15 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = LED_FUNCTION_MOBILE;
|
||||
};
|
||||
|
||||
/* populated but no hole on the case */
|
||||
led-7 {
|
||||
gpios = <&cp1_gpio1 16 GPIO_ACTIVE_HIGH>;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = LED_FUNCTION_WLAN;
|
||||
};
|
||||
|
||||
/* populated but no hole on the case */
|
||||
led-8 {
|
||||
gpios = <&cp1_gpio1 24 GPIO_ACTIVE_HIGH>;
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
function = LED_FUNCTION_WLAN;
|
||||
};
|
||||
|
||||
led_power_blue: led-9 {
|
||||
gpios = <&cp1_gpio1 26 GPIO_ACTIVE_HIGH>;
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
function = LED_FUNCTION_POWER;
|
||||
};
|
||||
|
||||
/* populated but no hole on the case (unused) */
|
||||
led-10 {
|
||||
gpios = <&gpio5 7 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
function = "unused";
|
||||
};
|
||||
};
|
||||
|
||||
regulator-usb-vbus {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb-vbus";
|
||||
gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
sfp: sfp {
|
||||
/*
|
||||
* Note: port LEDs on RJ45/SFP are switched
|
||||
* by pin7 on &cp0_gpio2
|
||||
*
|
||||
* - HIGH: RJ45
|
||||
* - LOW : SFP
|
||||
*/
|
||||
compatible = "sff,sfp";
|
||||
i2c-bus = <&cp0_i2c1>;
|
||||
los-gpios = <&gpio3 11 GPIO_ACTIVE_HIGH>;
|
||||
mod-def0-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>;
|
||||
tx-disable-gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>;
|
||||
tx-fault-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
|
||||
maximum-power-milliwatt = <2000>;
|
||||
};
|
||||
};
|
||||
|
||||
/* USB Type-C UART console */
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
&ap_pinctrl {
|
||||
pmx_ap_sdhci0_pins: ap-sdhci0-pins {
|
||||
marvell,pins = "mpp12";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
/* MicroSD slot */
|
||||
&ap_sdhci0 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-0 = <&pmx_ap_sdhci0_pins>;
|
||||
pinctrl-names = "default";
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&ap_gpio 12 GPIO_ACTIVE_LOW>;
|
||||
/*
|
||||
* Not stable in HS modes - phy needs "more calibration", so add
|
||||
* the "slow-mode" and disable SDR104, SDR50 and DDR50 modes.
|
||||
*/
|
||||
marvell,xenon-phy-slow-mode;
|
||||
no-1-8-v;
|
||||
};
|
||||
|
||||
&cp0_ethernet {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* LAN1-8 (Switch) */
|
||||
&cp0_eth0 {
|
||||
status = "okay";
|
||||
|
||||
phy-connection-type = "10gbase-r";
|
||||
phys = <&cp0_comphy2 0>;
|
||||
|
||||
fixed-link {
|
||||
speed = <10000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
/* 2x PCA9555, 2x NCT7802Y, TCA9534A */
|
||||
&cp0_i2c0 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmx_cp0_i2c0_pins>;
|
||||
clock-frequency = <100000>;
|
||||
|
||||
gpio3: gpio@21 {
|
||||
pinctrl-0 = <&pmx_pca9555_pins>;
|
||||
pinctrl-names = "default";
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x21>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&cp0_gpio2>;
|
||||
interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpio4: gpio@22 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x22>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
hwmon@2b {
|
||||
compatible = "nuvoton,nct7802";
|
||||
reg = <0x2b>;
|
||||
};
|
||||
|
||||
hwmon@2d {
|
||||
compatible = "nuvoton,nct7802";
|
||||
reg = <0x2d>;
|
||||
};
|
||||
|
||||
/* TI TCA9534A */
|
||||
gpio5: gpio@3b {
|
||||
compatible = "nxp,pca9534";
|
||||
reg = <0x3b>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
/* EEPROM */
|
||||
&cp0_i2c1 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmx_cp0_i2c1_pins>;
|
||||
clock-frequency = <100000>;
|
||||
|
||||
/* Giantec GT24C04A */
|
||||
eeprom@54 {
|
||||
compatible = "atmel,24c04";
|
||||
reg = <0x54>;
|
||||
wp-gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_mdio {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-0 = <&pmx_cp0_mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
/* Marvell 88E6393X */
|
||||
switch@0 {
|
||||
compatible = "marvell,mv88e6190";
|
||||
reg = <0x0>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
ethernet = <&cp0_eth0>;
|
||||
phy-connection-type = "10gbase-r";
|
||||
|
||||
fixed-link {
|
||||
speed = <10000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
swport1: port@1 {
|
||||
reg = <1>;
|
||||
label = "lan1";
|
||||
phy-handle = <&swphy1>;
|
||||
};
|
||||
|
||||
swport2: port@2 {
|
||||
reg = <2>;
|
||||
label = "lan2";
|
||||
phy-handle = <&swphy2>;
|
||||
};
|
||||
|
||||
swport3: port@3 {
|
||||
reg = <3>;
|
||||
label = "lan3";
|
||||
phy-handle = <&swphy3>;
|
||||
};
|
||||
|
||||
swport4: port@4 {
|
||||
reg = <4>;
|
||||
label = "lan4";
|
||||
phy-handle = <&swphy4>;
|
||||
};
|
||||
|
||||
swport5: port@5 {
|
||||
reg = <5>;
|
||||
label = "lan5";
|
||||
phy-handle = <&swphy5>;
|
||||
};
|
||||
|
||||
swport6: port@6 {
|
||||
reg = <6>;
|
||||
label = "lan6";
|
||||
phy-handle = <&swphy6>;
|
||||
};
|
||||
|
||||
swport7: port@7 {
|
||||
reg = <7>;
|
||||
label = "lan7";
|
||||
phy-handle = <&swphy7>;
|
||||
};
|
||||
|
||||
swport8: port@8 {
|
||||
reg = <8>;
|
||||
label = "lan8";
|
||||
phy-handle = <&swphy8>;
|
||||
};
|
||||
};
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
swphy1: switch-phy@1 {
|
||||
reg = <0x1>;
|
||||
};
|
||||
|
||||
swphy2: switch-phy@2 {
|
||||
reg = <0x2>;
|
||||
};
|
||||
|
||||
swphy3: switch-phy@3 {
|
||||
reg = <0x3>;
|
||||
};
|
||||
|
||||
swphy4: switch-phy@4 {
|
||||
reg = <0x4>;
|
||||
};
|
||||
|
||||
swphy5: switch-phy@5 {
|
||||
reg = <0x5>;
|
||||
};
|
||||
|
||||
swphy6: switch-phy@6 {
|
||||
reg = <0x6>;
|
||||
};
|
||||
|
||||
swphy7: switch-phy@7 {
|
||||
reg = <0x7>;
|
||||
};
|
||||
|
||||
swphy8: switch-phy@8 {
|
||||
reg = <0x8>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_pinctrl {
|
||||
pmx_cp0_mdio_pins: cp0-mdio-pins {
|
||||
marvell,pins = "mpp32", "mpp34";
|
||||
marvell,function = "ge";
|
||||
};
|
||||
|
||||
pmx_cp0_spi1_pins: cp0-spi0-pins {
|
||||
marvell,pins = "mpp40", "mpp41", "mpp42", "mpp43";
|
||||
marvell,function = "spi0";
|
||||
};
|
||||
|
||||
pmx_cp0_i2c0_pins: cp0-i2c0-pins {
|
||||
marvell,pins = "mpp37", "mpp38";
|
||||
marvell,function = "i2c0";
|
||||
};
|
||||
|
||||
pmx_cp0_i2c1_pins: cp0-i2c1-pins {
|
||||
marvell,pins = "mpp35", "mpp36";
|
||||
marvell,function = "i2c1";
|
||||
};
|
||||
|
||||
pmx_cp0_sdhci0_pins: cp0-sdhci0-pins {
|
||||
marvell,pins = "mpp56", "mpp57","mpp58", "mpp59", "mpp60", "mpp61";
|
||||
marvell,function = "sdio";
|
||||
};
|
||||
|
||||
pmx_cp1_rgmii1_pins: cp1-rgmii1-pins {
|
||||
marvell,pins = "mpp44", "mpp45", "mpp46", "mpp47", "mpp48", "mpp49",
|
||||
"mpp50", "mpp51", "mpp52", "mpp53", "mpp54", "mpp55";
|
||||
marvell,function = "ge1";
|
||||
};
|
||||
|
||||
pmx_pca9555_pins: pca9555-pins {
|
||||
marvell,pins = "mpp33";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
/* eMMC */
|
||||
&cp0_sdhci0 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmx_cp0_sdhci0_pins>;
|
||||
bus-width = <4>;
|
||||
non-removable;
|
||||
};
|
||||
|
||||
&cp0_utmi {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* USB 3.0 Type-A */
|
||||
&cp0_usb3_0 {
|
||||
status = "okay";
|
||||
|
||||
dr_mode = "host";
|
||||
phys = <&cp0_comphy1 0>, <&cp0_utmi0>;
|
||||
phy-names = "cp0-usb3h0-comphy", "utmi";
|
||||
};
|
||||
|
||||
&cp1_ethernet {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-0 = <&pmx_cp1_rgmii1_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
/* "DMZ" (RJ45/SFP) */
|
||||
&cp1_eth1 {
|
||||
status = "okay";
|
||||
|
||||
phy-connection-type = "rgmii-id";
|
||||
phy-handle = <ðphy0>;
|
||||
};
|
||||
|
||||
/* "WAN" */
|
||||
&cp1_eth2 {
|
||||
status = "okay";
|
||||
|
||||
phy-connection-type = "sgmii";
|
||||
phy-handle = <ðphy1>;
|
||||
phys = <&cp1_comphy1 2>;
|
||||
};
|
||||
|
||||
&cp1_mdio {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-0 = <&pmx_cp1_mdio_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
/* Marvell 88E1512 */
|
||||
ethphy0: ethernet-phy@0 {
|
||||
compatible = "ethernet-phy-id0141,0dd1",
|
||||
"ethernet-phy-ieee802.3-c22";
|
||||
reg = <0x0>;
|
||||
/*
|
||||
* LED[0] (Green): LINK/ACT
|
||||
* LED[1] (Amber): SPEED 100/1000M
|
||||
*/
|
||||
marvell,reg-init = <3 16 0 0x61>;
|
||||
sfp = <&sfp>;
|
||||
};
|
||||
|
||||
/* Marvell 88E1512 */
|
||||
ethphy1: ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-id0141,0dd1",
|
||||
"ethernet-phy-ieee802.3-c22";
|
||||
reg = <0x1>;
|
||||
/*
|
||||
* LED[0] (Green): LINK/ACT
|
||||
* LED[1] (Amber): SPEED 100/1000M
|
||||
*/
|
||||
marvell,reg-init = <3 16 0 0x61>;
|
||||
};
|
||||
};
|
||||
|
||||
&cp1_pinctrl {
|
||||
pmx_gpio_keys_pins: gpio-keys-pins {
|
||||
marvell,pins = "mpp31";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_gpio_leds_pins: gpio-leds-pins {
|
||||
marvell,pins = "mpp2", "mpp3", "mpp6", "mpp7", "mpp11", "mpp14",
|
||||
"mpp15", "mpp16", "mpp24", "mpp26";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_cp1_mdio_pins: mdio-pins {
|
||||
marvell,pins = "mpp4", "mpp5";
|
||||
marvell,function = "ge";
|
||||
};
|
||||
};
|
||||
|
|
@ -1,513 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright SolidRun Ltd.
|
||||
* Copyright (C) 2024 Tobias Schramm <tobias@t-sys.eu>
|
||||
*
|
||||
* Device tree for the CN9130-based ClearFog Pro
|
||||
*/
|
||||
|
||||
#include "cn9130.dtsi"
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
|
||||
/ {
|
||||
model = "SolidRun ClearFog Pro";
|
||||
compatible = "solidrun,clearfog-pro", "marvell,armada-ap807-quad",
|
||||
"marvell,armada-ap807";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
aliases {
|
||||
gpio1 = &cp0_gpio1;
|
||||
gpio2 = &cp0_gpio2;
|
||||
i2c0 = &cp0_i2c0;
|
||||
ethernet0 = &cp0_eth0;
|
||||
ethernet1 = &cp0_eth1;
|
||||
ethernet2 = &cp0_eth2;
|
||||
spi1 = &cp0_spi1;
|
||||
};
|
||||
|
||||
memory@00000000 {
|
||||
reg = <0x0 0x0 0x1 0x0>;
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
/* Virtual regulator, root of power tree */
|
||||
vin: regulator-vin {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vin";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
};
|
||||
|
||||
/* Regulators supplied by vin */
|
||||
v_5v0: regulator-v_5v0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "v_5v0";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
vin-supply = <&vin>;
|
||||
};
|
||||
|
||||
v_3v3: regulator-v_3v3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "v_3v3";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&vin>;
|
||||
};
|
||||
|
||||
/* Regulators supplied by v_5v0 */
|
||||
v_1v8: regulator-v_1v8 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "v_1v8";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
vin-supply = <&v_5v0>;
|
||||
};
|
||||
|
||||
v_5v0_usb3_hst_vbus: regulator-v_5v0_usb3_hst_vbus {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "v_5v0_usb3_hst_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpios = <&expander0 6 GPIO_ACTIVE_LOW>;
|
||||
vin-supply = <&v_5v0>;
|
||||
};
|
||||
|
||||
/* Regulators internal to SOM */
|
||||
vqmmc: regulator-vqmmc {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vqmmc";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
vin-supply = <&v_5v0>;
|
||||
};
|
||||
|
||||
cp0_usb3_0_phy1: cp0_usb3_phy@1 {
|
||||
compatible = "usb-nop-xceiv";
|
||||
vbus-supply = <&v_5v0_usb3_hst_vbus>;
|
||||
};
|
||||
|
||||
cp0_sfp_eth0: sfp-eth@0 {
|
||||
compatible = "sff,sfp";
|
||||
i2c-bus = <&cp0_i2c1>;
|
||||
los-gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
|
||||
mod-def0-gpio = <&expander0 15 GPIO_ACTIVE_LOW>;
|
||||
tx-disable-gpio = <&expander0 14 GPIO_ACTIVE_HIGH>;
|
||||
tx-fault-gpio = <&expander0 13 GPIO_ACTIVE_HIGH>;
|
||||
maximum-power-milliwatt = <2000>;
|
||||
};
|
||||
|
||||
keys {
|
||||
compatible = "gpio-keys";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_button_pin>;
|
||||
|
||||
reset {
|
||||
label = "Reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&cp0_gpio2 0 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* on-board eMMC */
|
||||
&ap_sdhci0 {
|
||||
bus-width = <8>;
|
||||
pinctrl-names = "default";
|
||||
vqmmc-supply = <&vqmmc>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_crypto {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_ethernet {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_gpio1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_gpio2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_i2c0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_i2c0_pins>;
|
||||
clock-frequency = <100000>;
|
||||
|
||||
/*
|
||||
* PCA9655 GPIO expander, up to 1MHz clock.
|
||||
* 0-CON3 CLKREQ#
|
||||
* 1-CON3 PERST#
|
||||
* 2-CON2 PERST#
|
||||
* 3-CON3 W_DISABLE
|
||||
* 4-CON2 CLKREQ#
|
||||
* 5-USB3 overcurrent
|
||||
* 6-USB3 power
|
||||
* 7-CON2 W_DISABLE
|
||||
* 8-JP4 P1
|
||||
* 9-JP4 P4
|
||||
* 10-JP4 P5
|
||||
* 11-m.2 DEVSLP
|
||||
* 12-SFP_LOS
|
||||
* 13-SFP_TX_FAULT
|
||||
* 14-SFP_TX_DISABLE
|
||||
* 15-SFP_MOD_DEF0
|
||||
*/
|
||||
expander0: gpio-expander@20 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x20>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-parent = <&cp0_gpio1>;
|
||||
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_expander0_pins>;
|
||||
vcc-supply = <&v_3v3>;
|
||||
|
||||
pcie1_0_clkreq {
|
||||
gpio-hog;
|
||||
gpios = <0 GPIO_ACTIVE_LOW>;
|
||||
input;
|
||||
line-name = "pcie1.0-clkreq";
|
||||
};
|
||||
|
||||
pcie1_0_w_disable {
|
||||
gpio-hog;
|
||||
gpios = <3 GPIO_ACTIVE_LOW>;
|
||||
output-low;
|
||||
line-name = "pcie1.0-w-disable";
|
||||
};
|
||||
|
||||
pcie2_0_clkreq {
|
||||
gpio-hog;
|
||||
gpios = <4 GPIO_ACTIVE_LOW>;
|
||||
input;
|
||||
line-name = "pcie2.0-clkreq";
|
||||
};
|
||||
|
||||
pcie2_0_w_disable {
|
||||
gpio-hog;
|
||||
gpios = <7 GPIO_ACTIVE_LOW>;
|
||||
output-low;
|
||||
line-name = "pcie2.0-w-disable";
|
||||
};
|
||||
|
||||
usb3_ilimit {
|
||||
gpio-hog;
|
||||
gpios = <5 GPIO_ACTIVE_LOW>;
|
||||
input;
|
||||
line-name = "usb3-current-limit";
|
||||
};
|
||||
|
||||
m2_devslp {
|
||||
gpio-hog;
|
||||
gpios = <11 GPIO_ACTIVE_HIGH>;
|
||||
output-low;
|
||||
line-name = "m.2 devslp";
|
||||
};
|
||||
};
|
||||
|
||||
/* ADC only for mikroBUS connector */
|
||||
mcp3021@4c {
|
||||
compatible = "microchip,mcp3021";
|
||||
reg = <0x4c>;
|
||||
};
|
||||
|
||||
/* EEPROM on the SOM */
|
||||
eeprom@53 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
pagesize = <16>;
|
||||
read-only;
|
||||
|
||||
nvmem-layout {
|
||||
compatible = "onie,tlv-layout";
|
||||
|
||||
onie_tlv_macaddr: mac-address {
|
||||
#nvmem-cell-cells = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* SMBUS on mini PCIe sockets */
|
||||
&cp0_i2c1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_i2c1_pins>;
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
&cp0_mdio {
|
||||
status = "okay";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
/* Green led blinks on activity, orange LED on link */
|
||||
marvell,reg-init = <3 16 0 0x0064>;
|
||||
};
|
||||
|
||||
switch@4 {
|
||||
compatible = "marvell,mv88e6085";
|
||||
reg = <4>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-parent = <&cp0_gpio1>;
|
||||
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_dsa0_pins>;
|
||||
reset-gpios = <&cp0_gpio1 27 GPIO_ACTIVE_LOW>;
|
||||
|
||||
mdio-external {
|
||||
compatible = "marvell,mv88e6xxx-mdio-external";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/* 88E1512 PHY */
|
||||
port6_phy: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan5";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan4";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan3";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
port@4 {
|
||||
reg = <4>;
|
||||
label = "lan1";
|
||||
};
|
||||
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
ethernet = <&cp0_eth1>;
|
||||
label = "cpu";
|
||||
phy-mode = "rgmii-id";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
port@6 {
|
||||
/* 88E1512 external phy */
|
||||
reg = <6>;
|
||||
label = "lan6";
|
||||
phy-handle = <&port6_phy>;
|
||||
phy-mode = "rgmii-id";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* SRDS #0 - SATA on bottom M.2 B-Key connector */
|
||||
&cp0_sata0 {
|
||||
status = "okay";
|
||||
|
||||
sata-port@0 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sata-port@1 {
|
||||
phys = <&cp0_comphy0 1>;
|
||||
target-supply = <&v_3v3>;
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_utmi {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* mini PCIe slot far from SOM, USB 2.0 only, SS lanes unused */
|
||||
&cp0_usb3_0 {
|
||||
status = "okay";
|
||||
phys = <&cp0_utmi0>;
|
||||
phy-names = "utmi";
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
/* SRDS #1 - USB-A 3.0 host port */
|
||||
&cp0_usb3_1 {
|
||||
status = "okay";
|
||||
phys = <&cp0_utmi1>, <&cp0_comphy1 0>;
|
||||
phy-names = "utmi", "usb";
|
||||
usb-phy = <&cp0_usb3_0_phy1>;
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
/* SRDS #2 - SFP+ 10GE */
|
||||
&cp0_eth0 {
|
||||
status = "okay";
|
||||
phy-mode = "10gbase-r";
|
||||
phys = <&cp0_comphy2 0>;
|
||||
managed = "in-band-status";
|
||||
nvmem-cells = <&onie_tlv_macaddr 0>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
sfp = <&cp0_sfp_eth0>;
|
||||
};
|
||||
|
||||
/* SRDS #3 - SGMII 1GE to L2 switch */
|
||||
&cp0_eth1 {
|
||||
status = "okay";
|
||||
phys = <&cp0_comphy3 1>;
|
||||
phy-mode = "sgmii";
|
||||
nvmem-cells = <&onie_tlv_macaddr 1>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
/* SRDS #4 - mini PCIe slot near SOM */
|
||||
&cp0_pcie1 {
|
||||
status = "okay";
|
||||
phys = <&cp0_comphy4 1>;
|
||||
num-lanes = <1>;
|
||||
reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
/* SRDS #5 - mini PCIe slot far from SOM */
|
||||
&cp0_pcie2 {
|
||||
status = "okay";
|
||||
phys = <&cp0_comphy5 2>;
|
||||
num-lanes = <1>;
|
||||
reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
/* GE PHY RGMII */
|
||||
&cp0_eth2 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_ge2_rgmii_pins>;
|
||||
phy = <&phy0>;
|
||||
phy-mode = "rgmii-id";
|
||||
nvmem-cells = <&onie_tlv_macaddr 2>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
/* micro SD card slot */
|
||||
&cp0_sdhci0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_sdhci_pins &cp0_sdhci_cd_pins>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&cp0_gpio2 11 GPIO_ACTIVE_LOW>;
|
||||
no-1-8-v;
|
||||
vqmmc-supply = <&v_3v3>;
|
||||
vmmc-supply = <&v_3v3>;
|
||||
};
|
||||
|
||||
&cp0_spi1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_spi1_pins>;
|
||||
|
||||
spi-flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0x0>;
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x1>;
|
||||
spi-max-frequency = <10000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_syscon0 {
|
||||
cp0_pinctrl: pinctrl {
|
||||
compatible = "marvell,cp115-standalone-pinctrl";
|
||||
|
||||
cp0_i2c0_pins: cp0-i2c0-pins {
|
||||
marvell,pins = "mpp37", "mpp38";
|
||||
marvell,function = "i2c0";
|
||||
};
|
||||
|
||||
cp0_i2c1_pins: cp0-i2c1-pins {
|
||||
marvell,pins = "mpp35", "mpp36";
|
||||
marvell,function = "i2c1";
|
||||
};
|
||||
|
||||
cp0_ge2_rgmii_pins: cp0-ge2-rgmii-pins {
|
||||
marvell,pins = "mpp44", "mpp45", "mpp46",
|
||||
"mpp47", "mpp48", "mpp49",
|
||||
"mpp50", "mpp51", "mpp52",
|
||||
"mpp53", "mpp54", "mpp55";
|
||||
marvell,function = "ge1";
|
||||
};
|
||||
|
||||
cp0_sdhci_cd_pins: cp0-sdhci-cd-pins {
|
||||
marvell,pins = "mpp43";
|
||||
marvell,function = "sdio";
|
||||
};
|
||||
|
||||
cp0_sdhci_pins: cp0-sdhci-pins {
|
||||
marvell,pins = "mpp56", "mpp57", "mpp58",
|
||||
"mpp59", "mpp60", "mpp61";
|
||||
marvell,function = "sdio";
|
||||
};
|
||||
|
||||
cp0_spi1_pins: cp0-spi1-pins {
|
||||
marvell,pins = "mpp12", "mpp13", "mpp14",
|
||||
"mpp15", "mpp16";
|
||||
marvell,function = "spi1";
|
||||
};
|
||||
|
||||
cp0_dsa0_pins: cp0-dsa0-pins {
|
||||
marvell,pins = "mpp27", "mpp29";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
cp0_button_pin: cp0-button-pin {
|
||||
marvell,pins = "mpp32";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
cp0_expander0_pins: cp0-expander0-pins {
|
||||
marvell,pins = "mpp4";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,447 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
|
||||
/*
|
||||
* Copyright (C) 2019 Marvell International Ltd.
|
||||
*
|
||||
* Device tree for the CN9131-DB board.
|
||||
*/
|
||||
|
||||
#include "cn9130.dtsi"
|
||||
#include "puzzle-thermal.dtsi"
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
|
||||
/ {
|
||||
model = "iEi Puzzle-M901";
|
||||
compatible = "iei,puzzle-m901",
|
||||
"marvell,armada-ap807-quad", "marvell,armada-ap807";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
aliases {
|
||||
i2c0 = &cp1_i2c0;
|
||||
i2c1 = &cp0_i2c0;
|
||||
ethernet0 = &cp0_eth0;
|
||||
ethernet1 = &cp0_eth1;
|
||||
ethernet2 = &cp0_eth2;
|
||||
ethernet3 = &cp1_eth0;
|
||||
ethernet4 = &cp1_eth1;
|
||||
ethernet5 = &cp1_eth2;
|
||||
gpio1 = &cp0_gpio1;
|
||||
gpio2 = &cp0_gpio2;
|
||||
gpio3 = &cp1_gpio1;
|
||||
gpio4 = &cp1_gpio2;
|
||||
led-boot = &led_power;
|
||||
led-failsafe = &led_info;
|
||||
led-running = &led_power;
|
||||
led-upgrade = &led_info;
|
||||
};
|
||||
|
||||
memory@00000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x0 0x0 0x80000000>;
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
reset {
|
||||
label = "Reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&cp0_gpio2 4 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
chassis0-thermal {
|
||||
thermal-sensors = <&puzzle_hwmon 0>;
|
||||
PUZZLE_FAN_CHASSIS_THERMAL(chassis0, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
chassis1-thermal {
|
||||
thermal-sensors = <&puzzle_hwmon 1>;
|
||||
PUZZLE_FAN_CHASSIS_THERMAL(chassis1, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp0-phy0-thermal {
|
||||
thermal-sensors = <&cp0_nbaset_phy0>;
|
||||
PUZZLE_FAN_THERMAL(cp0_phy0, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp0-phy1-thermal {
|
||||
thermal-sensors = <&cp0_nbaset_phy1>;
|
||||
PUZZLE_FAN_THERMAL(cp0_phy1, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp0-phy2-thermal {
|
||||
thermal-sensors = <&cp0_nbaset_phy2>;
|
||||
PUZZLE_FAN_THERMAL(cp0_phy2, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp1-phy0-thermal {
|
||||
thermal-sensors = <&cp1_nbaset_phy0>;
|
||||
PUZZLE_FAN_THERMAL(cp1_phy0, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp1-phy1-thermal {
|
||||
thermal-sensors = <&cp1_nbaset_phy1>;
|
||||
PUZZLE_FAN_THERMAL(cp1_phy1, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp1-phy2-thermal {
|
||||
thermal-sensors = <&cp1_nbaset_phy2>;
|
||||
PUZZLE_FAN_THERMAL(cp1_phy2, &chassis_fan_group0);
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_uart0 {
|
||||
status = "okay";
|
||||
|
||||
puzzle-mcu {
|
||||
compatible = "iei,wt61p803-puzzle";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
current-speed = <115200>;
|
||||
enable-beep;
|
||||
status = "okay";
|
||||
|
||||
leds {
|
||||
compatible = "iei,wt61p803-puzzle-leds";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
|
||||
led@0 {
|
||||
reg = <0>;
|
||||
label = "white:network";
|
||||
active-low;
|
||||
};
|
||||
|
||||
led@1 {
|
||||
reg = <1>;
|
||||
label = "green:cloud";
|
||||
active-low;
|
||||
};
|
||||
|
||||
led_info: led@2 {
|
||||
reg = <2>;
|
||||
label = "orange:info";
|
||||
active-low;
|
||||
};
|
||||
|
||||
led_power: led@3 {
|
||||
reg = <3>;
|
||||
function = LED_FUNCTION_POWER;
|
||||
color = <LED_COLOR_ID_YELLOW>;
|
||||
active-low;
|
||||
default-state = "on";
|
||||
};
|
||||
};
|
||||
|
||||
puzzle_hwmon: hwmon {
|
||||
compatible = "iei,wt61p803-puzzle-hwmon";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#thermal-sensor-cells = <1>;
|
||||
|
||||
chassis_fan_group0: fan-group@0 {
|
||||
#cooling-cells = <2>;
|
||||
reg = <0x00>;
|
||||
cooling-levels = <0 159 195 211 223 241 255>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* on-board eMMC - U9 */
|
||||
&ap_sdhci0 {
|
||||
pinctrl-names = "default";
|
||||
bus-width = <8>;
|
||||
status = "okay";
|
||||
mmc-ddr-1_8v;
|
||||
mmc-hs400-1_8v;
|
||||
};
|
||||
|
||||
&cp0_crypto {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_xmdio {
|
||||
status = "okay";
|
||||
cp0_nbaset_phy0: ethernet-phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <2>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
cp0_nbaset_phy1: ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <0>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
cp0_nbaset_phy2: ethernet-phy@2 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <8>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_ethernet {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* SLM-1521-V2, CON9 */
|
||||
&cp0_eth0 {
|
||||
status = "okay";
|
||||
phy-mode = "2500base-x";
|
||||
phys = <&cp0_comphy2 0>;
|
||||
phy = <&cp0_nbaset_phy0>;
|
||||
};
|
||||
|
||||
&cp0_eth1 {
|
||||
status = "okay";
|
||||
phy-mode = "2500base-x";
|
||||
phys = <&cp0_comphy4 1>;
|
||||
phy = <&cp0_nbaset_phy1>;
|
||||
};
|
||||
|
||||
&cp0_eth2 {
|
||||
status = "okay";
|
||||
phy-mode = "2500base-x";
|
||||
phys = <&cp0_comphy5 2>;
|
||||
phy = <&cp0_nbaset_phy2>;
|
||||
};
|
||||
|
||||
&cp0_gpio1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_gpio2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_i2c0_pins>;
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
rtc@32 {
|
||||
compatible = "epson,rx8130";
|
||||
reg = <0x32>;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
/* SLM-1521-V2, CON6 */
|
||||
&cp0_pcie0 {
|
||||
status = "okay";
|
||||
num-lanes = <2>;
|
||||
num-viewport = <8>;
|
||||
phys = <&cp0_comphy0 0>, <&cp0_comphy1 0>;
|
||||
};
|
||||
|
||||
/* U55 */
|
||||
&cp0_spi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_spi0_pins>;
|
||||
reg = <0x700680 0x50>, /* control */
|
||||
<0x2000000 0x1000000>; /* CS0 */
|
||||
status = "okay";
|
||||
spi-flash@0 {
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x1>;
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0x0>;
|
||||
spi-max-frequency = <40000000>;
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
partition@0 {
|
||||
label = "U-Boot";
|
||||
reg = <0x0 0x1f0000>;
|
||||
};
|
||||
partition@1f0000 {
|
||||
label = "U-Boot ENV Factory";
|
||||
reg = <0x1f0000 0x10000>;
|
||||
};
|
||||
partition@200000 {
|
||||
label = "Reserved";
|
||||
reg = <0x200000 0x1f0000>;
|
||||
};
|
||||
partition@3f0000 {
|
||||
label = "U-Boot ENV";
|
||||
reg = <0x3f0000 0x10000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_rtc {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&cp0_syscon0 {
|
||||
cp0_pinctrl: pinctrl {
|
||||
compatible = "marvell,cp115-standalone-pinctrl";
|
||||
cp0_i2c0_pins: cp0-i2c-pins-0 {
|
||||
marvell,pins = "mpp37", "mpp38";
|
||||
marvell,function = "i2c0";
|
||||
};
|
||||
cp0_i2c1_pins: cp0-i2c-pins-1 {
|
||||
marvell,pins = "mpp35", "mpp36";
|
||||
marvell,function = "i2c1";
|
||||
};
|
||||
cp0_ge1_rgmii_pins: cp0-ge-rgmii-pins-0 {
|
||||
marvell,pins = "mpp0", "mpp1", "mpp2",
|
||||
"mpp3", "mpp4", "mpp5",
|
||||
"mpp6", "mpp7", "mpp8",
|
||||
"mpp9", "mpp10", "mpp11";
|
||||
marvell,function = "ge0";
|
||||
};
|
||||
cp0_ge2_rgmii_pins: cp0-ge-rgmii-pins-1 {
|
||||
marvell,pins = "mpp44", "mpp45", "mpp46",
|
||||
"mpp47", "mpp48", "mpp49",
|
||||
"mpp50", "mpp51", "mpp52",
|
||||
"mpp53", "mpp54", "mpp55";
|
||||
marvell,function = "ge1";
|
||||
};
|
||||
cp0_spi0_pins: cp0-spi-pins-0 {
|
||||
marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
|
||||
marvell,function = "spi1";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/*
|
||||
* Instantiate the first connected CP115
|
||||
*/
|
||||
|
||||
#define CP11X_NAME cp1
|
||||
#define CP11X_BASE f6000000
|
||||
#define CP11X_PCIEx_MEM_BASE(iface) (0xe2000000 + (iface * 0x1000000))
|
||||
#define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000
|
||||
#define CP11X_PCIE0_BASE f6600000
|
||||
#define CP11X_PCIE1_BASE f6620000
|
||||
#define CP11X_PCIE2_BASE f6640000
|
||||
|
||||
#include "armada-cp115.dtsi"
|
||||
|
||||
#undef CP11X_NAME
|
||||
#undef CP11X_BASE
|
||||
#undef CP11X_PCIEx_MEM_BASE
|
||||
#undef CP11X_PCIEx_MEM_SIZE
|
||||
#undef CP11X_PCIE0_BASE
|
||||
#undef CP11X_PCIE1_BASE
|
||||
#undef CP11X_PCIE2_BASE
|
||||
|
||||
&cp1_crypto {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp1_xmdio {
|
||||
status = "okay";
|
||||
cp1_nbaset_phy0: ethernet-phy@3 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <2>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
cp1_nbaset_phy1: ethernet-phy@4 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <0>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
cp1_nbaset_phy2: ethernet-phy@5 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <8>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&cp1_ethernet {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* CON50 */
|
||||
&cp1_eth0 {
|
||||
status = "okay";
|
||||
phy-mode = "2500base-x";
|
||||
phys = <&cp1_comphy2 0>;
|
||||
phy = <&cp1_nbaset_phy0>;
|
||||
};
|
||||
|
||||
&cp1_eth1 {
|
||||
status = "okay";
|
||||
phy-mode = "2500base-x";
|
||||
phys = <&cp1_comphy4 1>;
|
||||
phy = <&cp1_nbaset_phy1>;
|
||||
};
|
||||
|
||||
&cp1_eth2 {
|
||||
status = "okay";
|
||||
phy-mode = "2500base-x";
|
||||
phys = <&cp1_comphy5 2>;
|
||||
phy = <&cp1_nbaset_phy2>;
|
||||
};
|
||||
|
||||
&cp1_sata0 {
|
||||
status = "okay";
|
||||
sata-port@1 {
|
||||
status = "okay";
|
||||
phys = <&cp1_comphy0 1>;
|
||||
};
|
||||
};
|
||||
|
||||
&cp1_gpio1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp1_gpio2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp1_i2c0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp1_i2c0_pins>;
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
&cp1_rtc {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&cp1_syscon0 {
|
||||
cp1_pinctrl: pinctrl {
|
||||
compatible = "marvell,cp115-standalone-pinctrl";
|
||||
cp1_i2c0_pins: cp1-i2c-pins-0 {
|
||||
marvell,pins = "mpp37", "mpp38";
|
||||
marvell,function = "i2c0";
|
||||
};
|
||||
cp1_spi0_pins: cp1-spi-pins-0 {
|
||||
marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
|
||||
marvell,function = "spi1";
|
||||
};
|
||||
cp1_xhci0_vbus_pins: cp1-xhci0-vbus-pins {
|
||||
marvell,pins = "mpp3";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
cp1_sfp_pins: sfp-pins {
|
||||
marvell,pins = "mpp8", "mpp9", "mpp10", "mpp11";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cp1_usb3_1 {
|
||||
status = "okay";
|
||||
phys = <&cp1_comphy3 1>;
|
||||
phy-names = "usb";
|
||||
};
|
||||
|
|
@ -1,631 +0,0 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
|
||||
/*
|
||||
* Copyright (C) 2019 Marvell International Ltd.
|
||||
*
|
||||
* Device tree for the CN9132-DB board.
|
||||
*/
|
||||
|
||||
#include "cn9130.dtsi"
|
||||
#include "puzzle-thermal.dtsi"
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
|
||||
/ {
|
||||
model = "iEi Puzzle-M902";
|
||||
compatible = "iei,puzzle-m902",
|
||||
"marvell,armada-ap807-quad", "marvell,armada-ap807";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
aliases {
|
||||
i2c0 = &cp1_i2c0;
|
||||
i2c1 = &cp0_i2c0;
|
||||
gpio1 = &cp0_gpio1;
|
||||
gpio2 = &cp0_gpio2;
|
||||
gpio3 = &cp1_gpio1;
|
||||
gpio4 = &cp1_gpio2;
|
||||
gpio5 = &cp2_gpio1;
|
||||
gpio6 = &cp2_gpio2;
|
||||
ethernet0 = &cp0_eth0;
|
||||
ethernet1 = &cp0_eth1;
|
||||
ethernet2 = &cp0_eth2;
|
||||
ethernet3 = &cp1_eth0;
|
||||
ethernet4 = &cp1_eth1;
|
||||
ethernet5 = &cp1_eth2;
|
||||
ethernet6 = &cp2_eth0;
|
||||
ethernet7 = &cp2_eth1;
|
||||
ethernet8 = &cp2_eth2;
|
||||
spi1 = &cp0_spi0;
|
||||
spi2 = &cp0_spi1;
|
||||
led-boot = &led_power;
|
||||
led-failsafe = &led_info;
|
||||
led-running = &led_power;
|
||||
led-upgrade = &led_info;
|
||||
};
|
||||
|
||||
memory@00000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x0 0x0 0x80000000>;
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
reset {
|
||||
label = "Reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&cp0_gpio2 4 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
cp2_reg_usb3_vbus0: cp2_usb3_vbus@0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "cp2-xhci0-vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
enable-active-high;
|
||||
gpios = <&cp2_gpio1 2 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
cp2_usb3_0_phy0: cp2_usb3_phy0 {
|
||||
compatible = "usb-nop-xceiv";
|
||||
vcc-supply = <&cp2_reg_usb3_vbus0>;
|
||||
};
|
||||
|
||||
cp2_reg_usb3_vbus1: cp2_usb3_vbus@1 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "cp2-xhci1-vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
enable-active-high;
|
||||
gpios = <&cp2_gpio1 3 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
cp2_usb3_0_phy1: cp2_usb3_phy1 {
|
||||
compatible = "usb-nop-xceiv";
|
||||
vcc-supply = <&cp2_reg_usb3_vbus1>;
|
||||
};
|
||||
|
||||
cp2_sfp_eth0: sfp-eth0 {
|
||||
compatible = "sff,sfp";
|
||||
i2c-bus = <&cp2_sfpp0_i2c>;
|
||||
los-gpio = <&cp2_module_expander1 11 GPIO_ACTIVE_HIGH>;
|
||||
mod-def0-gpio = <&cp2_module_expander1 10 GPIO_ACTIVE_LOW>;
|
||||
tx-disable-gpio = <&cp2_module_expander1 9 GPIO_ACTIVE_HIGH>;
|
||||
tx-fault-gpio = <&cp2_module_expander1 8 GPIO_ACTIVE_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
chassis0-thermal {
|
||||
thermal-sensors = <&puzzle_hwmon 0>;
|
||||
PUZZLE_FAN_CHASSIS_THERMAL(chassis0, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
chassis1-thermal {
|
||||
thermal-sensors = <&puzzle_hwmon 1>;
|
||||
PUZZLE_FAN_CHASSIS_THERMAL(chassis1, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp0-phy0-thermal {
|
||||
thermal-sensors = <&cp0_nbaset_phy0>;
|
||||
PUZZLE_FAN_THERMAL(cp0_phy0, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp0-phy1-thermal {
|
||||
thermal-sensors = <&cp0_nbaset_phy1>;
|
||||
PUZZLE_FAN_THERMAL(cp0_phy1, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp0-phy2-thermal {
|
||||
thermal-sensors = <&cp0_nbaset_phy2>;
|
||||
PUZZLE_FAN_THERMAL(cp0_phy2, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp1-phy0-thermal {
|
||||
thermal-sensors = <&cp1_nbaset_phy0>;
|
||||
PUZZLE_FAN_THERMAL(cp1_phy0, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp1-phy1-thermal {
|
||||
thermal-sensors = <&cp1_nbaset_phy1>;
|
||||
PUZZLE_FAN_THERMAL(cp1_phy1, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp1-phy2-thermal {
|
||||
thermal-sensors = <&cp1_nbaset_phy2>;
|
||||
PUZZLE_FAN_THERMAL(cp1_phy2, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp2-phy0-thermal {
|
||||
thermal-sensors = <&cp2_nbaset_phy0>;
|
||||
PUZZLE_FAN_THERMAL(cp2_phy0, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp2-phy1-thermal {
|
||||
thermal-sensors = <&cp2_nbaset_phy1>;
|
||||
PUZZLE_FAN_THERMAL(cp2_phy1, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp2-phy2-thermal {
|
||||
thermal-sensors = <&cp2_nbaset_phy2>;
|
||||
PUZZLE_FAN_THERMAL(cp2_phy2, &chassis_fan_group0);
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_uart0 {
|
||||
status = "okay";
|
||||
|
||||
puzzle-mcu {
|
||||
compatible = "iei,wt61p803-puzzle";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
current-speed = <115200>;
|
||||
enable-beep;
|
||||
status = "okay";
|
||||
|
||||
leds {
|
||||
compatible = "iei,wt61p803-puzzle-leds";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
|
||||
led@0 {
|
||||
reg = <0>;
|
||||
label = "white:network";
|
||||
active-low;
|
||||
};
|
||||
|
||||
led@1 {
|
||||
reg = <1>;
|
||||
label = "green:cloud";
|
||||
active-low;
|
||||
};
|
||||
|
||||
led_info: led@2 {
|
||||
reg = <2>;
|
||||
label = "orange:info";
|
||||
active-low;
|
||||
};
|
||||
|
||||
led_power: led@3 {
|
||||
reg = <3>;
|
||||
function = LED_FUNCTION_POWER;
|
||||
color = <LED_COLOR_ID_YELLOW>;
|
||||
active-low;
|
||||
default-state = "on";
|
||||
};
|
||||
};
|
||||
|
||||
puzzle_hwmon: hwmon {
|
||||
compatible = "iei,wt61p803-puzzle-hwmon";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#thermal-sensor-cells = <1>;
|
||||
|
||||
chassis_fan_group0: fan-group@0 {
|
||||
#cooling-cells = <2>;
|
||||
reg = <0x00>;
|
||||
cooling-levels = <0 159 195 211 223 241 255>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* on-board eMMC - U9 */
|
||||
&ap_sdhci0 {
|
||||
pinctrl-names = "default";
|
||||
bus-width = <8>;
|
||||
status = "okay";
|
||||
mmc-ddr-1_8v;
|
||||
mmc-hs400-1_8v;
|
||||
};
|
||||
|
||||
&cp0_crypto {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_xmdio {
|
||||
status = "okay";
|
||||
cp0_nbaset_phy0: ethernet-phy@2 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <2>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
cp0_nbaset_phy1: ethernet-phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <0>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
cp0_nbaset_phy2: ethernet-phy@8 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <8>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_ethernet {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* SLM-1521-V2, CON9 */
|
||||
&cp0_eth0 {
|
||||
status = "okay";
|
||||
phy-mode = "10gbase-kr";
|
||||
phys = <&cp0_comphy2 0>;
|
||||
phy = <&cp0_nbaset_phy0>;
|
||||
};
|
||||
|
||||
&cp0_eth1 {
|
||||
status = "okay";
|
||||
phy-mode = "2500base-x";
|
||||
phys = <&cp0_comphy4 1>;
|
||||
phy = <&cp0_nbaset_phy1>;
|
||||
};
|
||||
|
||||
&cp0_eth2 {
|
||||
status = "okay";
|
||||
phy-mode = "2500base-x";
|
||||
phys = <&cp0_comphy1 2>;
|
||||
phy = <&cp0_nbaset_phy2>;
|
||||
};
|
||||
|
||||
&cp0_gpio1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_gpio2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_i2c0_pins>;
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
rtc@32 {
|
||||
compatible = "epson,rx8130";
|
||||
reg = <0x32>;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_i2c1 {
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
/* SLM-1521-V2, CON6 */
|
||||
&cp0_sata0 {
|
||||
status = "okay";
|
||||
sata-port@1 {
|
||||
status = "okay";
|
||||
phys = <&cp0_comphy0 1>;
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_pcie2 {
|
||||
status = "okay";
|
||||
num-lanes = <1>;
|
||||
num-viewport = <8>;
|
||||
phys = <&cp0_comphy5 2>;
|
||||
};
|
||||
|
||||
/* U55 */
|
||||
&cp0_spi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_spi0_pins>;
|
||||
reg = <0x700680 0x50>, /* control */
|
||||
<0x2000000 0x1000000>; /* CS0 */
|
||||
status = "okay";
|
||||
spi-flash@0 {
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x1>;
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0x0>;
|
||||
spi-max-frequency = <40000000>;
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
partition@0 {
|
||||
label = "U-Boot";
|
||||
reg = <0x0 0x1f0000>;
|
||||
};
|
||||
partition@1f0000 {
|
||||
label = "U-Boot ENV Factory";
|
||||
reg = <0x1f0000 0x10000>;
|
||||
};
|
||||
partition@200000 {
|
||||
label = "Reserved";
|
||||
reg = <0x200000 0x1f0000>;
|
||||
};
|
||||
partition@3f0000 {
|
||||
label = "U-Boot ENV";
|
||||
reg = <0x3f0000 0x10000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_rtc {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&cp0_syscon0 {
|
||||
cp0_pinctrl: pinctrl {
|
||||
compatible = "marvell,cp115-standalone-pinctrl";
|
||||
cp0_i2c0_pins: cp0-i2c-pins-0 {
|
||||
marvell,pins = "mpp37", "mpp38";
|
||||
marvell,function = "i2c0";
|
||||
};
|
||||
cp0_i2c1_pins: cp0-i2c-pins-1 {
|
||||
marvell,pins = "mpp35", "mpp36";
|
||||
marvell,function = "i2c1";
|
||||
};
|
||||
cp0_ge1_rgmii_pins: cp0-ge-rgmii-pins-0 {
|
||||
marvell,pins = "mpp0", "mpp1", "mpp2",
|
||||
"mpp3", "mpp4", "mpp5",
|
||||
"mpp6", "mpp7", "mpp8",
|
||||
"mpp9", "mpp10", "mpp11";
|
||||
marvell,function = "ge0";
|
||||
};
|
||||
cp0_ge2_rgmii_pins: cp0-ge-rgmii-pins-1 {
|
||||
marvell,pins = "mpp44", "mpp45", "mpp46",
|
||||
"mpp47", "mpp48", "mpp49",
|
||||
"mpp50", "mpp51", "mpp52",
|
||||
"mpp53", "mpp54", "mpp55";
|
||||
marvell,function = "ge1";
|
||||
};
|
||||
cp0_spi0_pins: cp0-spi-pins-0 {
|
||||
marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
|
||||
marvell,function = "spi1";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_usb3_1 {
|
||||
status = "okay";
|
||||
phys = <&cp0_comphy3 1>;
|
||||
phy-names = "usb";
|
||||
};
|
||||
|
||||
/*
|
||||
* Instantiate the first connected CP115
|
||||
*/
|
||||
|
||||
#define CP11X_NAME cp1
|
||||
#define CP11X_BASE f4000000
|
||||
#define CP11X_PCIEx_MEM_BASE(iface) (0xe2000000 + (iface * 0x1000000))
|
||||
#define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000
|
||||
#define CP11X_PCIE0_BASE f4600000
|
||||
#define CP11X_PCIE1_BASE f4620000
|
||||
#define CP11X_PCIE2_BASE f4640000
|
||||
|
||||
#include "armada-cp115.dtsi"
|
||||
|
||||
#undef CP11X_NAME
|
||||
#undef CP11X_BASE
|
||||
#undef CP11X_PCIEx_MEM_BASE
|
||||
#undef CP11X_PCIEx_MEM_SIZE
|
||||
#undef CP11X_PCIE0_BASE
|
||||
#undef CP11X_PCIE1_BASE
|
||||
#undef CP11X_PCIE2_BASE
|
||||
|
||||
&cp1_crypto {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp1_xmdio {
|
||||
status = "okay";
|
||||
cp1_nbaset_phy0: ethernet-phy@2 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <2>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
cp1_nbaset_phy1: ethernet-phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <0>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
cp1_nbaset_phy2: ethernet-phy@8 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <8>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&cp1_ethernet {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* CON50 */
|
||||
&cp1_eth0 {
|
||||
status = "okay";
|
||||
phy-mode = "10gbase-kr";
|
||||
phys = <&cp1_comphy2 0>;
|
||||
phy = <&cp1_nbaset_phy0>;
|
||||
};
|
||||
|
||||
&cp1_eth1 {
|
||||
status = "okay";
|
||||
phy-mode = "2500base-x";
|
||||
phys = <&cp1_comphy4 1>;
|
||||
phy = <&cp1_nbaset_phy1>;
|
||||
};
|
||||
|
||||
&cp1_eth2 {
|
||||
status = "okay";
|
||||
phy-mode = "2500base-x";
|
||||
phys = <&cp1_comphy1 2>;
|
||||
phy = <&cp1_nbaset_phy2>;
|
||||
};
|
||||
|
||||
&cp1_gpio1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp1_gpio2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp1_i2c0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp1_i2c0_pins>;
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
&cp1_rtc {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&cp1_syscon0 {
|
||||
cp1_pinctrl: pinctrl {
|
||||
compatible = "marvell,cp115-standalone-pinctrl";
|
||||
cp1_i2c0_pins: cp1-i2c-pins-0 {
|
||||
marvell,pins = "mpp37", "mpp38";
|
||||
marvell,function = "i2c0";
|
||||
};
|
||||
cp1_spi0_pins: cp1-spi-pins-0 {
|
||||
marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
|
||||
marvell,function = "spi1";
|
||||
};
|
||||
cp1_xhci0_vbus_pins: cp1-xhci0-vbus-pins {
|
||||
marvell,pins = "mpp3";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/*
|
||||
* Instantiate the second connected CP115
|
||||
*/
|
||||
|
||||
#define CP11X_NAME cp2
|
||||
#define CP11X_BASE f6000000
|
||||
#define CP11X_PCIEx_MEM_BASE(iface) (0xe5000000 + (iface * 0x1000000))
|
||||
#define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000
|
||||
#define CP11X_PCIE0_BASE f6600000
|
||||
#define CP11X_PCIE1_BASE f6620000
|
||||
#define CP11X_PCIE2_BASE f6640000
|
||||
|
||||
#include "armada-cp115.dtsi"
|
||||
|
||||
#undef CP11X_NAME
|
||||
#undef CP11X_BASE
|
||||
#undef CP11X_PCIEx_MEM_BASE
|
||||
#undef CP11X_PCIEx_MEM_SIZE
|
||||
#undef CP11X_PCIE0_BASE
|
||||
#undef CP11X_PCIE1_BASE
|
||||
#undef CP11X_PCIE2_BASE
|
||||
|
||||
&cp2_crypto {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp2_ethernet {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp2_xmdio {
|
||||
status = "okay";
|
||||
cp2_nbaset_phy0: ethernet-phy@2 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <2>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
cp2_nbaset_phy1: ethernet-phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <0>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
cp2_nbaset_phy2: ethernet-phy@8 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <8>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
/* SLM-1521-V2, CON9 */
|
||||
&cp2_eth0 {
|
||||
status = "okay";
|
||||
phy-mode = "10gbase-kr";
|
||||
phys = <&cp2_comphy2 0>;
|
||||
phy = <&cp2_nbaset_phy0>;
|
||||
};
|
||||
|
||||
&cp2_eth1 {
|
||||
status = "okay";
|
||||
phy-mode = "2500base-x";
|
||||
phys = <&cp2_comphy4 1>;
|
||||
phy = <&cp2_nbaset_phy1>;
|
||||
};
|
||||
|
||||
&cp2_eth2 {
|
||||
status = "okay";
|
||||
phy-mode = "2500base-x";
|
||||
phys = <&cp2_comphy1 2>;
|
||||
phy = <&cp2_nbaset_phy2>;
|
||||
};
|
||||
|
||||
&cp2_gpio1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp2_gpio2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp2_i2c0 {
|
||||
clock-frequency = <100000>;
|
||||
/* SLM-1521-V2 - U3 */
|
||||
i2c-mux@72 {
|
||||
compatible = "nxp,pca9544";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x72>;
|
||||
cp2_sfpp0_i2c: i2c@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
i2c@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
/* U12 */
|
||||
cp2_module_expander1: pca9555@21 {
|
||||
compatible = "nxp,pca9555";
|
||||
pinctrl-names = "default";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
reg = <0x21>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cp2_rtc {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&cp2_syscon0 {
|
||||
cp2_pinctrl: pinctrl {
|
||||
compatible = "marvell,cp115-standalone-pinctrl";
|
||||
cp2_i2c0_pins: cp2-i2c-pins-0 {
|
||||
marvell,pins = "mpp37", "mpp38";
|
||||
marvell,function = "i2c0";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,98 +0,0 @@
|
|||
#define PUZZLE_FAN_THERMAL(_cname, _fan) \
|
||||
polling-delay-passive = <0>; \
|
||||
polling-delay = <1000>; \
|
||||
\
|
||||
trips { \
|
||||
_cname##_active_full: trip-point5 { \
|
||||
temperature = <70000>; \
|
||||
hysteresis = <3000>; \
|
||||
type = "active"; \
|
||||
}; \
|
||||
_cname##_active_very_high: trip-point4 { \
|
||||
temperature = <67500>; \
|
||||
hysteresis = <3000>; \
|
||||
type = "active"; \
|
||||
}; \
|
||||
_cname##_active_high: trip-point3 { \
|
||||
temperature = <65000>; \
|
||||
hysteresis = <5000>; \
|
||||
type = "active"; \
|
||||
}; \
|
||||
_cname##_active_med: trip-point2 { \
|
||||
temperature = <62500>; \
|
||||
hysteresis = <3000>; \
|
||||
type = "active"; \
|
||||
}; \
|
||||
_cname##_active_low: trip-point1 { \
|
||||
temperature = <60000>; \
|
||||
hysteresis = <3000>; \
|
||||
type = "active"; \
|
||||
}; \
|
||||
_cname##_active_min: trip-point0 { \
|
||||
temperature = <55000>; \
|
||||
hysteresis = <5000>; \
|
||||
type = "active"; \
|
||||
}; \
|
||||
}; \
|
||||
cooling-maps { \
|
||||
map5 { \
|
||||
trip = <&_cname##_active_full>; \
|
||||
cooling-device = <_fan 6 6>; \
|
||||
}; \
|
||||
map4 { \
|
||||
trip = <&_cname##_active_very_high>; \
|
||||
cooling-device = <_fan 5 5>; \
|
||||
}; \
|
||||
map3 { \
|
||||
trip = <&_cname##_active_high>; \
|
||||
cooling-device = <_fan 4 4>; \
|
||||
}; \
|
||||
map2 { \
|
||||
trip = <&_cname##_active_med>; \
|
||||
cooling-device = <_fan 3 3>; \
|
||||
}; \
|
||||
map1 { \
|
||||
trip = <&_cname##_active_low>; \
|
||||
cooling-device = <_fan 2 2>; \
|
||||
}; \
|
||||
map0 { \
|
||||
trip = <&_cname##_active_min>; \
|
||||
cooling-device = <_fan 1 1>; \
|
||||
}; \
|
||||
}
|
||||
|
||||
#define PUZZLE_FAN_CHASSIS_THERMAL(_cname, _fan) \
|
||||
polling-delay-passive = <0>; \
|
||||
polling-delay = <5000>; \
|
||||
\
|
||||
trips { \
|
||||
_cname##_active_full: trip-point2 { \
|
||||
temperature = <70000>; \
|
||||
hysteresis = <3000>; \
|
||||
type = "active"; \
|
||||
}; \
|
||||
_cname##_active_med: trip-point1 { \
|
||||
temperature = <62500>; \
|
||||
hysteresis = <3000>; \
|
||||
type = "active"; \
|
||||
}; \
|
||||
_cname##_active_min: trip-point0 { \
|
||||
temperature = <55000>; \
|
||||
hysteresis = <5000>; \
|
||||
type = "active"; \
|
||||
}; \
|
||||
}; \
|
||||
cooling-maps { \
|
||||
map2 { \
|
||||
trip = <&_cname##_active_full>; \
|
||||
cooling-device = <_fan 6 6>; \
|
||||
}; \
|
||||
map1 { \
|
||||
trip = <&_cname##_active_med>; \
|
||||
cooling-device = <_fan 3 3>; \
|
||||
}; \
|
||||
map0 { \
|
||||
trip = <&_cname##_active_min>; \
|
||||
cooling-device = <_fan 1 1>; \
|
||||
}; \
|
||||
}
|
||||
Loading…
Add table
Reference in a new issue