The MAC addresses for eth0 and the individual LAN ports are now
configured via device tree. The assignment itself stays the same as
before, matching factory firmware.
The 02_network script still sets the bridge MAC address, as it is
different from the lowest port MAC address.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21976
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add board support for the Xikestor SKS8300-12E2T2X switch.
Hardware specifications:
========================
-Realtek RTL9302C SoC, 1x MIPS-34Kc, 800 MHz
-512 MB DDR3 RAM
-32 MB SPI-NOR Flash
-12x 2.5GBASE-T Ports (RTL8224)
-2x 10GBASE-T Ports (RTL8261)
-2x 10G SPF+ Ports
-Reset Button on the front panel
-Power & SYS LED's
-UART (115200 8N1) via RJ45
Flash instruction:
==================
-Prepare TFTP server & connect to serial port
-Connect your computer to one of the RJ45 ports
-Power on and interrupt autoboot with Shift + A.
-Use Shift + Q to drop from vendor CLI to U-Boot CLI.
-Change U-Boot Bootcommand (needed for network functionality):
> setenv bootcmd 'rtk network on; boota'
> saveenv
-Start network:
> rtk network on
-Set switch IP and TFTP server IP:
> setenv ipaddr [IP-ADDRESS]
> setenv serverip [IP-ADDRESS]
-Load initramfs image from TFTP server:
> tftpboot 0x82000000 [IMAGEFILE]
-Boot with the downloaded image:
> bootm 0x82000000
-Backup the stock firmware if needed
-Perform sysupgrade with the sysupgrade image (in Luci or Terminal via scp & sysupgrade)
Back to stock firmware:
=======================
-In the Terminal enter:
> fw_setenv bootcmd 'boota'
-Write firmware with:
> sysupgrade -F [IMAGEFILE]
Signed-off-by: Michael Wagenhofer <michael@wagenhofer.de>
Link: https://github.com/openwrt/openwrt/pull/21773
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The SoC specific configuration structure is currently manually
assigned depending on the family_id. This will be removed in
the future. Make use of device_get_match_data() instead.
While we are here rename the structure prefix.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21866
Signed-off-by: Robert Marko <robimarko@gmail.com>
Port 21 definition was missed during addition of LGS328C.
Add it to the dts.
Fixes: 853d73f ("realtek: add support for Linksys LGS328C")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21793
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit adds support for Hasivo S1100WP-8GT-SE switch.
Device specification
--------------------
SoC Type: Realtek RTL9303
RAM: Samsung K4B2G1646F-BYMA (256MB DDR3 SDRAM)
Flash: Fudan FM25Q128A (16 MB)
Ethernet: 8x RTL8221B 10/100/1000/2500Mbps PHY
LEDs: 2 LEDs + 4 LEDs/port
1x power green (no control)
1x system green (via RLT9303 GPIO)
3x RJ45 LEDs/port (via HC595 shift registers on LED spi)
1x Green
1x Green/Orange
1x Orange LED/port for PoE status (below RJ45, on STC8)
Button: Reset
USB ports: None
Bootloader: Realtek U-Boot 2011.12.(3.6.6.55087) (Nov 13 2022 - 14:37:31)
Fan: None installed (but board provision for temp/FET/fan)
POE: 2x HS104PTI for 802.3af/at/bt PoE (Not yet working)
Installing OpenWrt
------------------
1. UART RJ45 requires soldering a connector to the empty footprint (RJ1).
(Amphenol RJHSEE380 or similar)
2. Connect to UART 38400@8n1, using Cisco Console Rollover cable (RS232)
3. Set computer IP to 192.168.0.111, and plug in with 2.5Gbps
4. Enter bootloader by pressing esc key during boot
5. Enter password `Hs2021cfgmg`
6. Type `XXXX` to get into U-Boot
7. Type `rtk network on`
8. Use tftp if you have a 2.5G link (other speeds won't work).
If serial, you can increase baudrate in uboot with `setenv baudrate 115200`
9.1. `tftpboot 0x84f00000 <openwrt-initramfs-filename>`
9.2. Otherwise use serial transfer (Y modem): `loady 0x84f00000`
10. `bootm 0x84f00000`
Now you should be in OpenWRT, and can use sysupgrade to install.
Signed-off-by: Bevan Weiss <bevan.weiss@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21576
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
XikeStor SKS8300-8T is a 8 ports Multi-Gig switch, based on the RTL9303.
Specifications:
- SoC : Realtek RTL9303
- RAM : DDR3 512 MiB
- Flash : SPI-NOR 32 MiB (Macronix)
- CPU : 800MHz
- Ethernet : 8× 1G/2.5G/5G/10G Base-T RJ45 ports (RTL8261N)
- Keys (GPIO) : 1x
- UART : "Console" port on the front panel
- type : RS-232C
- connector : RJ-45
- settings : 115200 8N1
- Power : 12 VDC, 4A
- Temperature sensor : LM75 or compatible
- Fan controller : SensyLink CTF2302
Flash instruction using initramfs image:
1. Prepare TFTP server & connect to serial port.
2. Connect your computer to one of the RJ45 ports on SKS8300-8T
3. Power on SKS8300-8T and interrupt autoboot with Shift + A.
4. Use Shift + Q to drop from vendor CLI to U-Boot CLI.
5. Set the boot command to enable network on boot.
> setenv bootcmd 'mw.l 0x8401da94 0; rtk network on; boota'
6. Set switch IP and TFTP server IP (optional, adjust to your setup).
> setenv ipaddr <ip>
> setenv serverip <ip>
7. Download initramfs image from TFTP server.
> tftpboot 0x83000000 <image name>
8. Boot with the downloaded image.
> bootm 0x83000000
9. With rambooted OpenWrt, backup the stock firmware if needed.
10. Copy sysupgrade image to the device.
11. Perform sysupgrade with the sysupgrade image.
12. After reboot, you should have functional OpenWrt.
In OpenWrt, it is necessary to execute "rtk network on" to enable full
networking functionality. However, the internal U-Boot initialization
(which shares logic with "rtk network init" initializing MAC only and
configures the fan controller) sets a flag at memory address 0x8401da94.
Once this flag is set, any subsequent calls to "rtk network on" are
blocked. To bypass this, resetting 0x8401da94 to 0 by step 5, ensuring
that the network can be properly initialized later. This specific
address was confirmed in U-Boot 2011.12.(3.6.11.55242) (Jan 06 2025 -
14:39:46) by decompiling the function that references the "rtk_mac_init"
string.
Reverting to stock firmware:
1. Connect to serial port.
2. Power on SKS8300-8T and interrupt autoboot with Shift + A.
3. Use Shift + Q to drop from vendor CLI to U-Boot CLI.
4. Set the boot command to the firmware default.
> setenv bootcmd boota
5. Enable network.
> rtk network on
6. Boot OpenWrt.
> boota
7. Download latest firmware from XikeStor and upload to your device.
8. Write firmware with 'sysupgrade -F'.
9. After reboot, stock firmware should boot automatically.
Co-authored-by: Samy Younsi <kame@duck.com>
Signed-off-by: FUKAYA Toshikuni <toshiq2@neenana.org>
Link: https://github.com/openwrt/openwrt/pull/21511
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Zyxel GS1900-24 B1 is a 24 port switch with two SFP ports, it is
identical to the A1 except for doubling the ram.
Specifications
--------------
* Device: Zyxel GS1900-24 B1
* SoC: Realtek RTL8382M 500 MHz MIPS 4KEc
* Flash: 16 MiB
* RAM: 128 MiB DDR2 SDRAM
* Ethernet: 24x 10/100/1000 Mbps, 2x SFP 100/1000 Mbps
* LEDs:
* 1 PWR LED (green, not configurable)
* 1 SYS LED (green, configurable)
* 24 ethernet port link/activity LEDs (green, SoC controlled)
* 2 SFP status/activity LEDs (green, SoC controlled)
* Buttons:
* 1 "RESET" button on front panel (soft reset)
* 1 button ('SW1') behind right hex grate (hardwired power-off)
* Power: 120-240V AC C13
* UART: Internal populated 10-pin header ('J5') providing RS232;
connected to SoC UART through a SIPEX 3232EC for voltage
level shifting.
* 'J5' RS232 Pinout (dot as pin 1):
2) SoC RXD
3) GND
10) SoC TXD
Serial connection parameters: 115200 8N1.
Installation
------------
OEM upgrade method:
* Log in to OEM management web interface
* Navigate to Maintenance > Firmware > Management
* If "Active Image" has the first option selected, OpenWrt will need to be
flashed to the "Active" partition. If the second option is selected,
OpenWrt will need to be flashed to the "Backup" partition.
* Navigate to Maintenance > Firmware > Upload
* Upload the openwrt-realtek-rtl838x-zyxel_gs1900-24-b1-initramfs-kernel.bin
file by your preferred method to the previously determined partition.
When prompted, select to boot from the newly flashed image, and reboot
the switch.
* Once OpenWrt has booted, scp the sysupgrade image to /tmp and flash it:
> sysupgrade /tmp/openwrt-realtek-rtl838x-zyxel_gs1900-24-b1-squashfs-sysupgrade.bin
U-Boot TFTP method:
* Configure your client with a static 192.168.1.x IP (e.g. 192.168.1.10).
* Set up a TFTP server on your client and make it serve the initramfs
image.
* Connect serial, power up the switch, interrupt U-boot by hitting the
space bar, and enable the network:
> rtk network on
> Since the GS1900-24 B1 is a dual-partition device, you want to keep the
OEM firmware on the backup partition for the time being. OpenWrt can
only be installed in the first partition anyway (hardcoded in the
DTS). To ensure we are set to boot from the first partition, issue the
following commands:
> setsys bootpartition 0
> savesys
* Download the image onto the device and boot from it:
> tftpboot 0x81f00000 192.168.1.10:openwrt-realtek-rtl838x-zyxel_gs1900-24-b1-initramfs-kernel.bin
> bootm
* Once OpenWrt has booted, scp the sysupgrade image to /tmp and flash it:
> sysupgrade /tmp/openwrt-realtek-rtl838x-zyxel_gs1900-24-b1-squashfs-sysupgrade.bin
Co-authored-by: Goetz Goerisch <ggoerisch@gmail.com>
Signed-off-by: Joe Holden <jwh@zorins.us>
Add memory size and adapt supported device.
Signed-off-by: Goetz Goerisch <ggoerisch@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21595
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
As there are actually 2 versions of the GS1900-24 where the only
difference is the amount of ram, use a common dtsi and make the
original A1 model dts include the dtsi and only override the memory size.
Signed-off-by: Joe Holden <jwh@zorins.us>
Move memory size to device dts.
Signed-off-by: Goetz Goerisch <ggoerisch@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21595
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The dts for RTL93xx devices has duplicate data about the
smi bus of a phy node. The parent node declares the number
of the bus and the realtek,smi-address attribute does the
same.
Remove the bus part from the realtek,smi-address attribute
and lookup the bus from the parent node. While we are here
remove all realtek,smi-address attributes where phy id
matches the bus address. The driver will use that as a
fallback.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Switch the mdio bus topology for devices that have their phys
attached to bus 1-3. This does not have any impact because
the mdio driver was completly redisgned
With this commit the bus id is stored twice. Once in the (new)
bus and in the (old) realtek,smi-address property. E.g.
&mdio_bus1 {
reg = <1>; <<< bus id
phy24: ethernet-phy@24 {
reg = <26>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 2>; <<< bus & address id
};
};
This redundancy will be removed later.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
RTL93xx devices have 4 smi busses (0-3). Add them to the dts.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SGMII only works correctly on this device if inband auto-negotiation is
enabled. Configure the PHY for SGMII and in-band mode in the device tree
to make this happen.
For 2.5G link speeds the PHY will still switch to 2500Base-X without AN.
The same configuration also works on RTL8226, so it is fine to apply
this change to the A1 revision of XGS1010-12/XGS1210-12 as well.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21605
Signed-off-by: Robert Marko <robimarko@gmail.com>
For the GS1920 the build system throws errors like
../dts/rtl8392_zyxel_gs1920-24hp-v1.dts:256.19-29:
Warning (reg_format): /switch@1b000000/ports/port@0:reg:
property has invalid length (4 bytes)
(#address-cells == 2, #size-cells == 1)
The dts misses the address and size properties for the
ports section. Fix that.
Fixes: 2a55846 ("realtek: add support for ZyXEL GS1920-24HPv1")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21534
Signed-off-by: Robert Marko <robimarko@gmail.com>
The GS1920-24HPv1 is a switch with 24 copper ports and 4 combo SFP/copper
ports and PoE on the first 24 ports.
Specifications:
---------------
* SoC: Realtek RTL8292M
* Flash: 16 MiB SPI flash
* RAM: 128 MiB
* Ethernet: 24x 10/100/1000 Mbps
* Buttons: 1x "Reset" button
* UART: 1x serial header, standard DCE pinout (Tx = 2, Rx = 3, Gnd = 5);
9600 baud, 8n1, +- 5.6V logic levels
* SFP: 4 combo copper/SFP ports
* PoE: 24x
* Fans: ADT7468 fan controller
Works:
------
- (24) RJ-45 ethernet ports
- Switch functions
- Buttons
- LEDs (partial support, the wrong LEDs light up)
- Manual fan control
Not yet enabled:
----------------
- PoE (requires patches to realtek-poe to support i2c)
- Combo ports (link is up, but no data is transferred)
Fans:
-----
After boot, the fans are running in full speed mode. You can interact
with the fan controller at /sys/class/hwmon/
Installation:
-------------
This device uses ZyNOS instead of Linux, this makes installation a bit
more cumbersome. Serial console is required!
1. Set the switch to boot from the first image. This step is crucial,
it will fail to boot if this is not set properly.
2. Connect to the switch using serial and interrupt the boot process
to enter debug/recovery mode.
3. Load the OpenWrt initramfs image via XMODEM. You need to obtain an
unlock code, based on your MAC address, first. See the excellent write
up at https://www.ixo.de/info/zyxel_uclinux/ for details. Replace
unlock_code in the commands below by the code obtained.
After running ATBA5, the terminal needs to be closed and re-opened
with 115200 baud. This speeds up the file transfer significantly!
The file length in bytes need to be given instead of file_length below.
You also need an XMODEM upload utility like "lrzsz-sx -X" to transfer
the file. Start the XMODEM upload after running the ATUPxxxx command:
> ATEN1,unlock_code
> ATBA5
> ATUP80100000,file_length
> ATGO80100000
4. Wait for OpenWrt to boot. Once this is done, transfer the loader binary
and the sysupgrade image to "/tmp" using scp.
5. Install OpenWrt permanently by running the following two commands on
the switch (over SSH):
> mtd write /tmp/loader.bin loader
> mtd write /tmp/sysupgrade.bin firmware
6. Reboot the switch and enjoy OpenWrt.
NB: You do not need to touch the loader binary unless it's recommended.
The loader is not part of a regular sysupgrade file and will be left
untouched. The boot loader only checks if the loader is valid to be
able to boot.
Recovery/ Return to stock:
--------------------------
Just spam the "u" key during (or "z" for 9600 baud) during memory testing
to trigger a recovery XMODEM upload at 115200 baud. A standard OEM upgrade
image works properly.
Signed-off-by: Andreas Böhler <dev@aboehler.at>
Link: https://github.com/openwrt/openwrt/pull/20439
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add support for the Edgecore ECS4100-12PH, an 8-port 802.3bt PoE Gigabit
Ethernet switch with 2 combo RJ45/SFP and 2 SFP ports.
Hardware:
* SoC: RTL8393M
* RAM: 256MiB
* Flash: 32MiB SPI-NOR
* Ethernet:
* 8x GbE RJ45 PoE (external RTL8218B)
* 2x GbE RJ45 / SFP combo (external RTL8214FC)
* 2x SFP (external RTL8214FC)
* Console: RJ45 RS232 port on front panel
* PoE: Nuvoton M0516 + 2x Broadcom BCM59121 PSE
Installation via bootloader:
* open serial console (baud rate 115200)
* interrupt boot process by pressing any key during boot
* boot the OpenWrt initramfs:
# rtk network on
# tftpboot 0x8f000000 /tftpboot/openwrt-realtek-rtl839x-edgecore_ecs4100-12ph-initramfs-kernel.bin
# bootm
* copy openwrt-realtek-rtl839x-edgecore_ecs4100-12ph-squashfs-sysupgrade.bin
to /tmp and use sysupgrade to install it:
# sysupgrade /tmp/openwrt-realtek-rtl839x-edgecore_ecs4100-12ph-squashfs-sysupgrade.bin
Even though U-Boot claims the switch is based on the RTL8392M SoC, my
device is based on the RTL8393M SoC. I have confirmed this by removing
the heatsink, and the Linux kernel agrees with this. Therefore the DTS
has the rtl8393_ prefix.
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
Add the SerDes setup hooks in the PCS driver for RTL839x so that
pcs_config actually triggers configuration. Adjust the DTS of all
devices accordingly by adding pcs-handles and dropping phy-handles.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21360
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
The GS110TUP's lan9 port is connected via a QSGMII PHY to SERDES 2, and
therefore should use the SWITCH_PORT_SDS macro instead of SWITCH_PORT. This
was missed in e956adfe because the GS110TUP is not particularly well
documented and the old code was confusing.
lan10 is an SFP and doesn't have an onboard PHY, so also remove its
associated PHY references and update it to match other devices' SFP ports.
Fixes: https://github.com/openwrt/openwrt/issues/21324
Signed-off-by: Jacob Potter <jacob@j4cbo.com>
Link: https://github.com/openwrt/openwrt/pull/21346
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The rtl9300,smi-address property was first developed for the RTL930x
targets. So it got a device specific prefix. Nowadays it is used for
RTL931x targets too. Convert it to our gerneric realtek prefix.
find ./realtek -type f -exec sed -i 's/rtl9300,smi-address/realtek,smi-address/g' {} +
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21343
Signed-off-by: Robert Marko <robimarko@gmail.com>
RTL930x devices have highmem starting address at 0x20000000.
The Linksys LGS328C highmem definition is wrongly shared with
the larger LGS352C RTL931x model and starts at 0x90000000.
Fix it by splitting the definition.
Fixes: 853d73f ("realtek: add support for Linksys LGS328C")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21262
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The ethernet driver uses registers in the switchcore range.
Rearrange the DTS nodes accordingly. This allows to make use
of regmap with syscon_node_to_regmap(np->parent) later.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21183
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Realtek Otto ethernet driver currently uses a single compatible
for all different models. Split this into the the four well known
subtargets. This allows to get rid of the central mach/soc include
later.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21183
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Remove all pseudo-PHYs and phy-handle properties from DTS of RTL838X
devices. RTL838X SerDes is now handled by PCS driver and thus not
treated as PHY anymore.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20876
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
After having moved the configuration code and sequences from PHY and
DSA drivers to the PCS driver, add the hooks in PCS driver and remove
calls in PHY and DSA drivers to let PCS driver setup the SerDes
entirely on its own.
Also add pcs-handle to device tree definitions for most of the switch
ports because, due to the refactoring of the SerDes configuration, this
is needed now for all SerDes-attached ports.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20876
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
EWS2910P has two SFP slots of which only one was fully supported so far.
The issue so far was that both SFP slots share the same I2C SCL line but
neither the kernel nor any downstream driver was able to deal with this.
Thus, only one SFP slot was completely working (with detection etc.) but
the other one had to be enabled manually. Networking was functional in
both though.
Since acd7ecc9ed we have a driver which is able to deal with that. Thus,
we can fix the SFP support for this device.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20687
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
As per #19596 - this allows eg, modifying the bootcmd etc.
This has been useful when testing on e.g the -48, where `rtk network on` is required for the SFP ports.
Signed-off-by: Joe Holden <jwh@zorins.us>
Link: https://github.com/openwrt/openwrt/pull/19913
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Plasma Cloud MCX3 Media Converter is a 3 port multi-GBit switch with
2x 10/100/1000/2500BaseT Ethernet ports and 1x SFP+ module slot.
Hardware:
- RTL9302C SoC
- Macronix MX25L25645G (32MB flash)
- Winbond W632GU6rB-11 (256MB DDR3 SDRAM)
- RTL8224 4x 10m/100m/1/2.5 Gigabit PHY
- IC+ IP802AR POE+ PSE controller
The media converter is powered by 54 Volts 1.2A barrel connector. The
internal TTL serial connector can be used to access the terminal. Pins from
1: TX RX (unused) GND. Serial connection is via 115200 baud, 8N1.
A reset button is accessible through a hole next to the SFP+ module slot.
Installation
------------
* The device can be flashed by using sysupgrade command. Either from the
original vendor firmware or using an initramfs (see "Debug")
* Connect serial as per the layout above. Connection parameters: 115200 8N1
* The image must be copied using scp to /tmp of the device
scp openwrt-realtek-rtl930x-plasmacloud_mcx3-squashfs-sysupgrade.bin root@[IP address of the device]:/tmp/
* start sysupgrade without saving the original vendor configuration
sysupgrade -n /tmp/openwrt-realtek-rtl930x-plasmacloud_mcx3-squashfs-sysupgrade.bin
Installation via u-boot
-----------------------
If you have an TFTP server connected to the switch, it is possible to
directly install the device using the factory image from u-boot
# setup networking and IP of TFP server
rtk network on
setenv ipaddr 10.100.100.99
setenv serverip 10.100.100.20
# get factory image
tftp 0x84000000 factory.bin
# erase firmware partitions
sf probe 0
sf erase 0x100000 0x01f00000
# write firmware to both partitions
sf write ${fileaddr} 0x100000 ${filesize}
sf write ${fileaddr} 0x1080000 ${filesize}
# adjust the boot commands
setenv bootargs "mtdparts=spi0.0:896k(u-boot),64k(u-boot-env),64k(u-boot-env2),15872k(inactive),15872k(firmware2)"
setenv bootcmd "rtk init; bootm 0xb5080000"
# restart
reset
Debug
-----
* Connect serial as per the layout above. Connection parameters: 115200 8N1.
* A tftp server is required, tftpd-hpa works well.
* Power the device, at U-Boot start rapidly hit Esc key to stop autoboot
* Enable network:
rtk network on
* Change ip address of device:
setenv ipaddr 192.168.1.6
* Download initramfs from TFTP server:
tftpboot 0x84000000 192.168.1.111:openwrt-realtek-rtl930x-plasmacloud_mcx3-initramfs-kernel.bin
* Boot loaded file:
bootm 0x84000000
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20625
Signed-off-by: Robert Marko <robimarko@gmail.com>
This device is very similar to the already supported XGS1210-12 A1. For
now, only revision A1 is supported (not marked on the label).
Hardware:
- RTL9302B SoC
- 16 MiB NOR flash
- 128 MiB DDR3 SDRAM
- 8x 1G RJ45 (RTL8218D)
- 2x 2.5G RJ45 (2x RTL8226)
- 2x SFP+ (supporting 1G/2.5G/10G)
- 3.3V UART serial (115200 baud 8N1) on the right side of the case
(from bottom to top: GND, RX, TX, VCC)
It is originally an unmanaged switch, so there are a few differences:
- No reset button
- Different partition layout: There is some reserved space in the middle
of the flash which might be used by the bootloader for flash testing.
The remaining space in between is used for OpenWrt using mtd-concat.
The largest contiguous area is at the beginning, allowing a maximum
kernel size of 7 MiB.
- No individual MAC address: This device ships with an empty U-Boot
environment. When an OpenWrt squashfs image is booted for the first
time, a random MAC address will be written to the environment (but
only if the environment has been initialized from the bootloader
before and contains the default MAC address).
Steps to boot initramfs image via network:
- Configure a TFTP server to provide the OpenWrt initramfs image
- Connect to device using serial (see hardware information above)
- Power on the device and enter U-Boot using Esc when prompted
- Run the following commands (adjust as necessary):
# rtk network on
# tftpboot 0x84f00000 192.168.1.100:openwrt-xgs1010-initramfs.bin
# bootm
Installation on flash:
- Boot initramfs image as described above
- Now is a good time to create a backup of all flash partitions! You'll
need this if you want to revert to the unmanaged factory firmware at
some point.
- Use sysupgrade to install OpenWrt
- After restart enter U-Boot again and set the boot command:
# setenv bootcmd 'rtk network on; bootm 0xb4900000'
# saveenv
# run bootcmd
Note: The command "rtk network on" is only needed because the drivers
currently rely on some setup by the bootloader (without this the RJ45
ports don't work). If the drivers improve in the future, it should be
removed (i.e. change the boot command to "bootm 0xb4900000").
Reverting to factory firmware:
- Write back your backup of the firmware partition (or write just the
fwconcat1 partition, and erase the other two fwconcat partitions)
- Change the boot command back to "boota" (or just erase the u-boot-env
partition so the default gets used)
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/20469
Signed-off-by: Robert Marko <robimarko@gmail.com>
This is a preparation for adding support for XGS1010-12, which is almost
identical to XGS1210-12, with some small differences (partition layout,
missing reset key).
In addition to moving the common parts to a new file, also simplify the
definition of the 2.5G PHYs to reduce duplication. With this change, the
revision-specific files only have to specify the SMI addresses.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/20469
Signed-off-by: Robert Marko <robimarko@gmail.com>
RTL93XX reached the point where the SerDes' are no longer treated as
regular PHYs. Instead, they are managed by the dedicated PCS driver.
Thus, all device tree definitions should follow this change.
Remove the pseudo-PHYs for the SerDes (so far usually defined with macro
INTERNAL_PHY) and corresponding 'phy-handle's from all SFP ports. This
removes a long-lasting confusion from our Realtek driver(s).
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20577
Signed-off-by: Robert Marko <robimarko@gmail.com>
Fix the GPIO assignment of RX-LOS and TX-DISABLE for all SFP ports. Both
were actually swapped when adding support for the device. Apparently,
this didn't cause any issues.
Fixes: 62d50fb196
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20532
Signed-off-by: Robert Marko <robimarko@gmail.com>
rev B1 is identical to rev A1 except for different PHYs on the 2.5gbps ports (lan9 and lan10)
Both revisions of xgs1210-12 are also switched to use rt-loader to avoid
problems due to overwriting the compressed image in memory when flashing
with the oem firmware (and also to save flash space with respect to gzip
compression)
Signed-off-by: Josh Bendavid <joshbendavid@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20161
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The A1 and B1 devices are largely the same. The differences
seem to be:
- RTL8218D (A1) vs RTL8218E (B1) PHY for the eight 1 Gbps TP ports
- Aquantia (A1) vs RTL8261N (B1) PHY for the three 10 Gbps TP ports
RTL8218D/E share the same driver and support was added already by
commit c8c187f0f0 ("realtek: add support for RTL8218E").
The RTL8261N is also already supported but it's located at
different addresses compared to the A1 device. This requires
the device tree to be split. As a result, the devices are require
different images.
I found the smi addresses on the forum:
https://forum.openwrt.org/t/support-for-rtl838x-based-managed-switches/57875/3622
And I can conform on my B1 device that this is working.
Co-developed-by: Mathias Kresin <dev@kresin.me>
Signed-off-by: Thomas Martitz <thomas.martitz@mailbox.org>
Link: https://github.com/openwrt/openwrt/pull/20150
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Plasma Cloud ESX28 Switch is a 24 + 4 port multi-GBit switch with
24x 10/100/1000/2500BaseT Ethernet ports and 4x SFP+ module slot.
Hardware:
- RTL9312C SoC
- Macronix MX25L25645G (32MB flash)
- 512MB DDR3 SDRAM
- RTL8231 GPIO extender to control the port LEDs
- 6x RTL8224 4x 10m/100m/1/2.5 Gigabit PHY
- SFP+ 4x 10GBit slot
The switch is powered directly via AC.
The external RS232 serial connector (RJ45, Cisco pinout) can be used to
access the terminal. Serial connection is via 115200 baud, 8N1.
A reset button is accessible through a hole in the front panel.
Installation
------------
* The device can be flashed by using sysupgrade command. Either from the
original vendor firmware or using an initramfs (see "Debug")
* Connect serial on front panel. Connection parameters: 115200 8N1
* The image must be copied using scp to /tmp of the device
scp openwrt-realtek-rtl931x-plasmacloud_esx28-squashfs-sysupgrade.bin root@[IP address of the device]:/tmp/
* start sysupgrade without saving the original vendor configuration
sysupgrade -n /tmp/openwrt-realtek-rtl931x-plasmacloud_esx28-squashfs-sysupgrade.bin
Installation via u-boot
-----------------------
If you have an TFTP server connected to the switch, it is possible to
directly install the device using the factory image from u-boot
# setup networking and IP of TFP server
rtk network on
setenv ipaddr 10.100.100.99
setenv serverip 10.100.100.20
# get factory image
tftp 0x84000000 factory.bin
# erase firmware partitions
sf probe 0
sf erase 0x5e0000 0x1a20000
# write firmware to both partitions
sf write ${fileaddr} 0x5e0000 ${filesize}
sf write ${fileaddr} 0x12f0000 ${filesize}
# adjust the boot commands
setenv bootargs "mtdparts=spi0.0:768k(u-boot),64k(u-boot-env),64k(u-boot-env2),5120k(reserved),13376k(inactive),13376k(firmware2)"
setenv bootcmd "rtk init; bootm 0xb52f0000"
# restart
reset
Debug
-----
* Connect serial on front panel. Connection parameters: 115200 8N1.
* A tftp server is required, tftpd-hpa works well.
* Power the device, at U-Boot start rapidly hit Esc key to stop autoboot
* Enter passwords: "1234" or "plasmapsx"
* Enable network:
rtk network on
* Change ip address of device:
setenv ipaddr 192.168.1.6
* Download initramfs from TFTP server:
tftpboot 0x84000000 192.168.1.111:openwrt-realtek-rtl931x-plasmacloud_esx28-initramfs-kernel.bin
* Boot loaded file:
bootm 0x84000000
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20172
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Plasma Cloud PSX28 Switch is a 24 + 4 port multi-GBit switch with
24x 10/100/1000/2500BaseT Ethernet ports and 4x SFP+ module slot.
Hardware:
- RTL9312C SoC
- Macronix MX25L25645G (32MB flash)
- 512MB DDR3 SDRAM
- RTL8231 GPIO extender to control the port LEDs
- 6x RTL8224 4x 10m/100m/1/2.5 Gigabit PHY
- SFP+ 4x 10GBit slot
- RTL8239 POE++ PSE controller with frontend MCU
The switch is powered directly via AC.
The external RS232 serial connector (RJ45, Cisco pinout) can be used to
access the terminal. Serial connection is via 115200 baud, 8N1.
A reset button is accessible through a hole in the front panel.
Installation
------------
* The device can be flashed by using sysupgrade command. Either from the
original vendor firmware or using an initramfs (see "Debug")
* Connect serial on front panel. Connection parameters: 115200 8N1
* The image must be copied using scp to /tmp of the device
scp openwrt-realtek-rtl931x-plasmacloud_psx28-squashfs-sysupgrade.bin root@[IP address of the device]:/tmp/
* start sysupgrade without saving the original vendor configuration
sysupgrade -n /tmp/openwrt-realtek-rtl931x-plasmacloud_psx28-squashfs-sysupgrade.bin
Installation via u-boot
-----------------------
If you have an TFTP server connected to the switch, it is possible to
directly install the device using the factory image from u-boot
# setup networking and IP of TFP server
rtk network on
setenv ipaddr 10.100.100.99
setenv serverip 10.100.100.20
# get factory image
tftp 0x84000000 factory.bin
# erase firmware partitions
sf probe 0
sf erase 0x5e0000 0x1a20000
# write firmware to both partitions
sf write ${fileaddr} 0x5e0000 ${filesize}
sf write ${fileaddr} 0x12f0000 ${filesize}
# adjust the boot commands
setenv bootargs "mtdparts=spi0.0:768k(u-boot),64k(u-boot-env),64k(u-boot-env2),5120k(reserved),13376k(inactive),13376k(firmware2)"
setenv bootcmd "rtk init; bootm 0xb52f0000"
# restart
reset
Debug
-----
* Connect serial on front panel. Connection parameters: 115200 8N1.
* A tftp server is required, tftpd-hpa works well.
* Power the device, at U-Boot start rapidly hit Esc key to stop autoboot
* Enter passwords: "1234" or "plasmapsx"
* Enable network:
rtk network on
* Change ip address of device:
setenv ipaddr 192.168.1.6
* Download initramfs from TFTP server:
tftpboot 0x84000000 192.168.1.111:openwrt-realtek-rtl931x-plasmacloud_psx28-initramfs-kernel.bin
* Boot loaded file:
bootm 0x84000000
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20172
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The RTL931x has next to its SPI flash controller a SPI master interface. It
is connected to
* SPI_CS#[1,0]: AH22 , AK22 (aka: GPIO 12, 11)
* SPI_CLK: AL23 (aka: GPIO 8)
* SPI_MISO: AM23 (aka: GPIO 9)
* SPI_MOSI: AL22 (aka: GPIO 10)
It is not the same as the SPI flash controller which uses pins:
* SPI_CS#[1,0]: B24, A24
* SPI_SCLK: A23
* SPI_SDI/SIO0: B21
* SPO_SDO_SIO1: B21
* SPI_SIO2: A22
* SPI_SIO3: B22
* SPI_RSTN: B23
As shown above, the SPI master controller shares its pin with GPIO 8, 9,
10, 11, 12. In some upcoming devices (like the Plasma Cloud PSX28/ESX28),
they will be used for SFP cage signaling. These pins must therefore be
switched manually to the GPIO mode.
The SPI_CTRL0 register provides all necessary configuration to enforce the
GPIO mode of the pins. And until more requirements (and a correct driver)
for the SPI master controller arise, it is therefore possible to use
pinctrl-single to configure it using the devicetree.
Previously the ethernet driver did configure the SPI master controller for
31.25 MHz. It is unknown for which kind of device this was originally made
and what was actually connected there. But this manual write to the
register conflicts potentially with the write of the pinctrl driver to the
same register. Luckily, we don't need this SPI speed configuration in the
ethernet driver. Still, to allow this device an easy migration, the
`spi0-31mhz` configuration was already prepared.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20263
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RTL8224 used by Plasma Cloud PSX8/PSX10 is not using USXGMII but
USXGMII 10G-QXGMII mode. The correct phy-mode string for this is
"10g-qxgmii".
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20239
Signed-off-by: Robert Marko <robimarko@gmail.com>
Upstream will get support for the Realtek ECC engine with 6.18.
To make use of this in Openwrt
- backport upstream patches
- change config so that ECC will be built for nand subtargets
- define ECC engine in RTL93xx DTS.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19746
Signed-off-by: Robert Marko <robimarko@gmail.com>
Align GS1900-10HP dts with other realtek devices to reduce the risk of device
specific regressions with the upcoming driver cleanup/rewrite.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/20228
Signed-off-by: Robert Marko <robimarko@gmail.com>
Now that MDIO and DSA driver only look for pcs-handle drop all
usages of the sds property.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20148
Signed-off-by: Robert Marko <robimarko@gmail.com>
Zyxel labels their switch revisions A1, B1, ... and not v1, v2, ...
Rename the supported device to A1 to make it clear this is the only
known compatible hardware revision.
Also add a compatible for seamless upgrade.
Signed-off-by: Stijn Segers <foss@volatilesystems.org>
Link: https://github.com/openwrt/openwrt/pull/20118
Signed-off-by: Robert Marko <robimarko@gmail.com>
Zyxel labels their switch revisions A1, B1, ... and not v1, v2, ...
Rename the devices as such in OpenWrt to match the labels. Of note:
the first (A1) revision is never labeled as such on the label, just
in the web UI. Provide compatibles for seamless sysupgrade.
For a recent overview of Zyxel GS1900 series revisions, see the
table linked in https://forum.openwrt.org/t//57875/3874.
Signed-off-by: Stijn Segers <foss@volatilesystems.org>
Link: https://github.com/openwrt/openwrt/pull/20118
Signed-off-by: Robert Marko <robimarko@gmail.com>
Zyxel labels their switch revisions A1, B1, ... and not v1, v2, ...
Rename the devices as such in OpenWrt to match the labels. Of note:
the first (A1) revision is never labeled as such on the label, just
in the web UI. Provide compatibles for seamless sysupgrade.
For a recent overview of Zyxel GS1900 series revisions, see the
table linked in https://forum.openwrt.org/t//57875/3874.
Signed-off-by: Stijn Segers <foss@volatilesystems.org>
Link: https://github.com/openwrt/openwrt/pull/20118
Signed-off-by: Robert Marko <robimarko@gmail.com>
For all switch ports where the assigned SerDes is known, add the new
pcs-handle to the dts. Leave the existing <sds> assignments to the
PHYs as is because the driver has not yet been updated.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20111
Signed-off-by: Robert Marko <robimarko@gmail.com>
Until now the the SerDes configuration is realized with helper functions
scattered around the DSA and PHY driver. Give them a new home as a PCS
driver.
The target design is as follows:
- dsa driver manages switch
- pcs driver manages SerDes on high level (this commit)
- mdio driver manages SerDes on low level
This driver adds the high level SerDes access via PCS. It makes use of
the low level mdio SerDes driver to access the registers.
Remark: This initial version provides exactly all phylink_pcs_ops that
are currently part of the DSA driver. So this can be swapped in one of
the next commits as a drop in replacement. To make use of it something
like this is needed:
...
ports = of_get_child_by_name(node, "ethernet-ports");
if (!ports)
return -EINVAL;
for_each_available_child_of_node(ports, port) {
pcs_node = of_parse_phandle(port, "pcs-handle", 0);
of_property_read_u32(port, "reg", &port_nr)) {
priv->pcs[port_nr] = rtpcs_create(dev, pcs_node, port_nr);
}
...
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20075
Signed-off-by: Robert Marko <robimarko@gmail.com>
In the future the PCS & DSA drivers will lookup the SerDes of a
switch port via pcs-handle (like upstream does). Provide a macro
that allows to expand the existing port definitions. To link a
SerDes to port simply do
Either in short form:
replace SWITCH_PORT(0, 1, qsgmii)
with SWITCH_PORT_SDS(0, 1, 3, qsgmii) (Link to SerDes 3)
Or in long form:
port@24 {
reg = <24>;
label = "lan25";
pcs-handle = <&serdes4>; (Link to SerDes 4)
phy-handle = <&phy24>;
phy-mode = "1000base-x";
managed = "in-band-status";
sfp = <&sfp0>;
};
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20075
Signed-off-by: Robert Marko <robimarko@gmail.com>
Currently following warnings are given
dts/rtl930x.dtsi:166.4-23: Warning (reg_format):
/switchcore@1b000000/i2c@36c:reg: property has invalid length
(8 bytes) (#address-cells == 2, #size-cells == 1)
Obviously default address-cells size is fixed to 64 bit. Align
with upstream and override address size to 32 bit.
Suggested-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20091
Signed-off-by: Robert Marko <robimarko@gmail.com>
