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ipq806x: dts: rework PCIe nodes for Chromium OnHub

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- Reuse the bridges node defined on "qcom-ipq8064.dtsi".
- Rename PCIe device nodes to unified "wifi@0,0".
- Add the missing "qcom,ath10k" compatibles.
- Remove unseless property "interrupt-controller". There are no
  consumers use these PCIe devices as interrupt controllers.
- Change bus number from 0 to 1, just like other ipq806x devices.
  The valid PCIe bus range on this platform is 1 - 255.

Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18989
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This commit is contained in:
Shiji Yang 2025-06-01 12:56:09 +08:00 • committed by Christian Marangi
parent b56c773176
commit a4c654b27c
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GPG key ID: AC001D09ADBFEAD7
1 changed files with 19 additions and 40 deletions
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59
target/linux/ipq806x/files-6.12/arch/arm/boot/dts/qcom/qcom-ipq8064-onhub.dtsi
View file

@ -452,59 +452,38 @@
&pcie0 {
status = "okay";
};
pcie@0 {
reg = <0 0 0 0 0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
interrupt-controller;
ath10k@0,0 {
reg = <0 0 0 0 0>;
device_type = "pci";
qcom,ath10k-sa-gpio = <2 3 4 0>;
qcom,ath10k-sa-gpio-func = <5 5 5 0>;
};
&pcie_bridge0 {
wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
qcom,ath10k-sa-gpio = <2 3 4 0>;
qcom,ath10k-sa-gpio-func = <5 5 5 0>;
};
};
&pcie1 {
status = "okay";
};
pcie@0 {
reg = <0 0 0 0 0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
interrupt-controller;
ath10k@0,0 {
reg = <0 0 0 0 0>;
device_type = "pci";
qcom,ath10k-sa-gpio = <2 3 4 0>;
qcom,ath10k-sa-gpio-func = <5 5 5 0>;
};
&pcie_bridge1 {
wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
qcom,ath10k-sa-gpio = <2 3 4 0>;
qcom,ath10k-sa-gpio-func = <5 5 5 0>;
};
};
&pcie2 {
status = "okay";
};
pcie@0 {
reg = <0 0 0 0 0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
interrupt-controller;
ath10k@0,0 {
reg = <0 0 0 0 0>;
device_type = "pci";
};
&pcie_bridge2 {
wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
};
};