forked from mirror/openwrt
ramips: fix wrong CRLF line-ending
Use Unix LF style instead of Windows CRLF style. Signed-off-by: Shiji Yang <yangshiji66@outlook.com> Link: https://github.com/openwrt/openwrt/pull/19963 Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
Shiji Yang
Robert Marko
parent
2420a77556
commit
98b160acd2
2 changed files with 215 additions and 215 deletions
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@ -1,197 +1,197 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "mt7621.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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/ {
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model = "Arcadyan WE410443";
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compatible = "arcadyan,we410443", "mediatek,mt7621-soc";
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aliases {
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led-boot = &led_status_green;
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led-failsafe = &led_status_red;
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led-running = &led_status_green;
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led-upgrade = &led_status_blue;
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};
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keys {
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compatible = "gpio-keys";
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wps {
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label = "wps";
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gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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reset {
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label = "reset";
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gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led_status_blue: blue {
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_STATUS;
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gpios = <&gpio 41 GPIO_ACTIVE_HIGH>;
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};
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led_status_green: green {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_STATUS;
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gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
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};
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led_status_red: red {
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_STATUS;
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gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <50000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "all";
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reg = <0x0 0x2000000>;
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read-only;
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};
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partition@1 {
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label = "u-boot";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "u-boot-env";
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reg = <0x30000 0x10000>;
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read-only;
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};
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partition@40000 {
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label = "factory";
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reg = <0x40000 0x10000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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eeprom_factory_0: eeprom@0 {
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reg = <0x0 0x4da8>;
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};
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eeprom_factory_8000: eeprom@8000 {
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reg = <0x8000 0x4da8>;
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};
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};
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};
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partition@50000 {
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compatible = "fixed-partitions";
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label = "firmware";
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reg = <0x50000 0x1f60000>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "kernel";
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reg = <0x0 0x440000>;
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};
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partition@400000 {
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label = "rootfs";
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reg = <0x440000 0x1b20000>;
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};
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};
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partition@1fb0000 {
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label = "glbcfg";
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reg = <0x1fb0000 0x10000>;
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read-only;
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};
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partition@1fc0000 {
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label = "config";
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reg = <0x1fc0000 0x10000>;
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read-only;
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};
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partition@1fd0000 {
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label = "glbcfg2";
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reg = <0x1fd0000 0x10000>;
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read-only;
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};
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partition@1fe0000 {
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label = "config2";
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reg = <0x1fe0000 0x10000>;
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read-only;
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};
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};
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};
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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wifi@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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nvmem-cells = <&eeprom_factory_0>;
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nvmem-cell-names = "eeprom";
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ieee80211-freq-limit = <2400000 2500000>;
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};
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};
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&pcie1 {
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wifi@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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nvmem-cells = <&eeprom_factory_8000>;
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nvmem-cell-names = "eeprom";
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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&state_default {
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gpio {
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groups = "i2c", "wdt", "sdhci";
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function = "gpio";
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};
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};
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&switch0 {
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ports {
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port@0 {
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status = "okay";
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label = "lan";
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};
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};
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};
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&xhci {
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status = "disabled";
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};
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "mt7621.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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/ {
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model = "Arcadyan WE410443";
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compatible = "arcadyan,we410443", "mediatek,mt7621-soc";
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aliases {
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led-boot = &led_status_green;
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led-failsafe = &led_status_red;
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led-running = &led_status_green;
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led-upgrade = &led_status_blue;
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};
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keys {
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compatible = "gpio-keys";
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wps {
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label = "wps";
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gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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reset {
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label = "reset";
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gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led_status_blue: blue {
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_STATUS;
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gpios = <&gpio 41 GPIO_ACTIVE_HIGH>;
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};
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led_status_green: green {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_STATUS;
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gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
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};
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led_status_red: red {
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_STATUS;
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gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <50000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "all";
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reg = <0x0 0x2000000>;
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read-only;
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};
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partition@1 {
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label = "u-boot";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "u-boot-env";
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reg = <0x30000 0x10000>;
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read-only;
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};
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partition@40000 {
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label = "factory";
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reg = <0x40000 0x10000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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eeprom_factory_0: eeprom@0 {
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reg = <0x0 0x4da8>;
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};
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eeprom_factory_8000: eeprom@8000 {
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reg = <0x8000 0x4da8>;
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};
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};
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};
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partition@50000 {
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compatible = "fixed-partitions";
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label = "firmware";
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reg = <0x50000 0x1f60000>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "kernel";
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reg = <0x0 0x440000>;
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};
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partition@400000 {
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label = "rootfs";
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reg = <0x440000 0x1b20000>;
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};
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};
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partition@1fb0000 {
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label = "glbcfg";
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reg = <0x1fb0000 0x10000>;
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read-only;
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};
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partition@1fc0000 {
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label = "config";
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reg = <0x1fc0000 0x10000>;
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read-only;
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};
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partition@1fd0000 {
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label = "glbcfg2";
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reg = <0x1fd0000 0x10000>;
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read-only;
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};
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partition@1fe0000 {
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label = "config2";
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reg = <0x1fe0000 0x10000>;
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read-only;
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};
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};
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};
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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wifi@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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nvmem-cells = <&eeprom_factory_0>;
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nvmem-cell-names = "eeprom";
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ieee80211-freq-limit = <2400000 2500000>;
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};
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};
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&pcie1 {
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wifi@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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nvmem-cells = <&eeprom_factory_8000>;
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nvmem-cell-names = "eeprom";
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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&state_default {
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gpio {
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groups = "i2c", "wdt", "sdhci";
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function = "gpio";
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};
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};
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&switch0 {
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ports {
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port@0 {
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status = "okay";
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label = "lan";
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};
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};
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};
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&xhci {
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status = "disabled";
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};
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@ -1,21 +1,21 @@
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From 6688b218552c6fd3178b40d7d106bf732caec3aa Mon Sep 17 00:00:00 2001
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From: Mieczyslaw Nalewaj <namiltd@yahoo.com>
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Date: Sat, 28 Dec 2024 18:09:17 +0100
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Subject: [PATCH] pci-rt2880: static pcibios_init
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Fixes error:
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arch/mips/pci/pci-rt2880.c:267:12: error: no previous prototype for 'pcibios_init' [-Werror=missing-prototypes]
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267 | int __init pcibios_init(void)
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| ^~~~~~~~~~~~
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cc1: all warnings being treated as errors
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make[8]: *** [scripts/Makefile.build:229: arch/mips/pci/pci-rt2880.o] Error 1
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make[7]: *** [scripts/Makefile.build:478: arch/mips/pci] Error 2
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Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
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---
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arch/mips/pci/pci-rt2880.c | 7 +++++++
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1 file changed, 7 insertions(+)
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From 6688b218552c6fd3178b40d7d106bf732caec3aa Mon Sep 17 00:00:00 2001
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From: Mieczyslaw Nalewaj <namiltd@yahoo.com>
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Date: Sat, 28 Dec 2024 18:09:17 +0100
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Subject: [PATCH] pci-rt2880: static pcibios_init
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Fixes error:
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arch/mips/pci/pci-rt2880.c:267:12: error: no previous prototype for 'pcibios_init' [-Werror=missing-prototypes]
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267 | int __init pcibios_init(void)
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| ^~~~~~~~~~~~
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cc1: all warnings being treated as errors
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make[8]: *** [scripts/Makefile.build:229: arch/mips/pci/pci-rt2880.o] Error 1
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make[7]: *** [scripts/Makefile.build:478: arch/mips/pci] Error 2
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Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
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---
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arch/mips/pci/pci-rt2880.c | 7 +++++++
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1 file changed, 7 insertions(+)
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--- a/arch/mips/pci/pci-rt2880.c
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+++ b/arch/mips/pci/pci-rt2880.c
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@@ -264,7 +264,7 @@ static struct platform_driver rt288x_pci
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