From 8b969f7e27ff46768260ecf2dd10d97b8dcc19a5 Mon Sep 17 00:00:00 2001 From: Markus Stockhausen Date: Sun, 1 Mar 2026 17:34:49 +0100 Subject: [PATCH] realtek: mdio: drop realtek,smi-address property A phy node in the dts has two properties: - reg: the (overall) address of the phy - realtek,smi-address: the address of the phy on its bus This notation does not align with upstream. reg should be the address of the phy on its bus. But where to get the overall address that is needed for register writes to the hardware? Luckily the mdio driver and the hardware design sync the ports and phys (overall) addresses. Thus derive missing data from the dts port nodes (below ethernet-ports). To realize this - carve out the port mapping into a separate function to align with the upstream driver. - do more sanity checks and catch more inconsistencies - raise more/better errors via dev_err_probe() With this commit all dts files must be rewritten as follows: - if phy has no realtek,smi-address leave it as is - if phy has realtek,smi-address, write that value into the reg property and drop realtek,smi-address. Remark: This commit might bring some confusion about the phyXX and phy@YY and naming convention. To be somehow consistent with the current port/phy identifiers from now on the dts will have: - phyXX: where XX matches the port number - phy@YY: where YY is the phy address on the mdio bus - : where YY is the phy address on the mdio bus Signed-off-by: Markus Stockhausen Link: https://github.com/openwrt/openwrt/pull/22236 Signed-off-by: Robert Marko --- .../dts/rtl9302_plasmacloud_common.dtsi | 20 ++- .../dts/rtl9302_xikestor_sks8300-12e2t2x.dts | 50 +++---- .../dts/rtl9302_zyxel_xgs1010-12-a1.dts | 10 +- .../dts/rtl9302_zyxel_xgs1210-12-a1.dts | 10 +- .../dts/rtl9302_zyxel_xgs1210-12-b1.dts | 10 +- .../dts/rtl9302_zyxel_xgs1250-12-a1.dts | 15 +-- .../dts/rtl9302_zyxel_xgs1250-12-b1.dts | 15 +-- .../dts/rtl9303_hasivo_s1100w-8xgt-se.dts | 35 ++--- .../dts/rtl9303_hasivo_s1100wp-8gt-se.dts | 38 +++--- .../dts/rtl9303_xikestor_sks8300-8t.dts | 35 ++--- .../realtek/dts/rtl9311_linksys_lgs352c.dts | 120 +++++++---------- .../dts/rtl9312_plasmacloud_common.dtsi | 126 ++++++++---------- .../drivers/net/mdio/mdio-realtek-otto.c | 102 +++++++++----- 13 files changed, 264 insertions(+), 322 deletions(-) diff --git a/target/linux/realtek/dts/rtl9302_plasmacloud_common.dtsi b/target/linux/realtek/dts/rtl9302_plasmacloud_common.dtsi index ba497d0b19..41eb699eb3 100644 --- a/target/linux/realtek/dts/rtl9302_plasmacloud_common.dtsi +++ b/target/linux/realtek/dts/rtl9302_plasmacloud_common.dtsi @@ -155,28 +155,24 @@ compatible = "ethernet-phy-ieee802.3-c45"; }; - phy8: ethernet-phy@8 { - reg = <8>; + phy8: ethernet-phy@4 { + reg = <4>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <4>; }; - phy9: ethernet-phy@9 { - reg = <9>; + phy9: ethernet-phy@5 { + reg = <5>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <5>; }; - phy10: ethernet-phy@10 { - reg = <10>; + phy10: ethernet-phy@6 { + reg = <6>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <6>; }; - phy11: ethernet-phy@11 { - reg = <11>; + phy11: ethernet-phy@7 { + reg = <7>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <7>; }; }; diff --git a/target/linux/realtek/dts/rtl9302_xikestor_sks8300-12e2t2x.dts b/target/linux/realtek/dts/rtl9302_xikestor_sks8300-12e2t2x.dts index b2678e628c..9ff9be3e14 100644 --- a/target/linux/realtek/dts/rtl9302_xikestor_sks8300-12e2t2x.dts +++ b/target/linux/realtek/dts/rtl9302_xikestor_sks8300-12e2t2x.dts @@ -166,61 +166,51 @@ }; &mdio_bus1 { - phy8: ethernet-phy@8 { + phy8: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c45"; - reg = <8>; - realtek,smi-address = <0>; + reg = <0>; }; - phy9: ethernet-phy@9 { + phy9: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c45"; - reg = <9>; - realtek,smi-address = <1>; + reg = <1>; }; - phy10: ethernet-phy@10 { + phy10: ethernet-phy@2 { compatible = "ethernet-phy-ieee802.3-c45"; - reg = <10>; - realtek,smi-address = <2>; + reg = <2>; }; - phy11: ethernet-phy@11 { + phy11: ethernet-phy@3 { compatible = "ethernet-phy-ieee802.3-c45"; - reg = <11>; - realtek,smi-address = <3>; + reg = <3>; }; }; &mdio_bus2 { - phy16: ethernet-phy@16 { + phy16: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c45"; - reg = <16>; - realtek,smi-address = <0>; + reg = <0>; }; - phy17: ethernet-phy@17 { + phy17: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c45"; - reg = <17>; - realtek,smi-address = <1>; + reg = <1>; }; - phy18: ethernet-phy@18 { + phy18: ethernet-phy@2 { compatible = "ethernet-phy-ieee802.3-c45"; - reg = <18>; - realtek,smi-address = <2>; + reg = <2>; }; - phy19: ethernet-phy@19 { + phy19: ethernet-phy@3 { compatible = "ethernet-phy-ieee802.3-c45"; - reg = <19>; - realtek,smi-address = <3>; + reg = <3>; }; }; &mdio_bus3 { - phy24: ethernet-phy@24 { + phy24: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c45"; - reg = <24>; - realtek,smi-address = <0>; + reg = <0>; }; - phy25: ethernet-phy@25 { + phy25: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c45"; - reg = <25>; - realtek,smi-address = <1>; + reg = <1>; }; }; diff --git a/target/linux/realtek/dts/rtl9302_zyxel_xgs1010-12-a1.dts b/target/linux/realtek/dts/rtl9302_zyxel_xgs1010-12-a1.dts index c136437bba..acd2195e0b 100644 --- a/target/linux/realtek/dts/rtl9302_zyxel_xgs1010-12-a1.dts +++ b/target/linux/realtek/dts/rtl9302_zyxel_xgs1010-12-a1.dts @@ -104,18 +104,16 @@ }; &mdio_bus1 { - phy24: ethernet-phy@24 { - reg = <24>; - realtek,smi-address = <8>; + phy24: ethernet-phy@8 { + reg = <8>; compatible = "ethernet-phy-ieee802.3-c45"; enet-phy-pair-order = <1>; }; }; &mdio_bus2 { - phy25: ethernet-phy@25 { - reg = <25>; - realtek,smi-address = <9>; + phy25: ethernet-phy@9 { + reg = <9>; compatible = "ethernet-phy-ieee802.3-c45"; enet-phy-pair-order = <1>; }; diff --git a/target/linux/realtek/dts/rtl9302_zyxel_xgs1210-12-a1.dts b/target/linux/realtek/dts/rtl9302_zyxel_xgs1210-12-a1.dts index 3f32b9b640..e2b4c8d057 100644 --- a/target/linux/realtek/dts/rtl9302_zyxel_xgs1210-12-a1.dts +++ b/target/linux/realtek/dts/rtl9302_zyxel_xgs1210-12-a1.dts @@ -9,18 +9,16 @@ }; &mdio_bus1 { - phy24: ethernet-phy@24 { - reg = <24>; - realtek,smi-address = <8>; + phy24: ethernet-phy@8 { + reg = <8>; compatible = "ethernet-phy-ieee802.3-c45"; enet-phy-pair-order = <1>; }; }; &mdio_bus2 { - phy25: ethernet-phy@25 { - reg = <25>; - realtek,smi-address = <9>; + phy25: ethernet-phy@9 { + reg = <9>; compatible = "ethernet-phy-ieee802.3-c45"; enet-phy-pair-order = <1>; }; diff --git a/target/linux/realtek/dts/rtl9302_zyxel_xgs1210-12-b1.dts b/target/linux/realtek/dts/rtl9302_zyxel_xgs1210-12-b1.dts index 2cff52ffaa..ebbf4c8cd1 100644 --- a/target/linux/realtek/dts/rtl9302_zyxel_xgs1210-12-b1.dts +++ b/target/linux/realtek/dts/rtl9302_zyxel_xgs1210-12-b1.dts @@ -9,17 +9,15 @@ }; &mdio_bus1 { - phy24: ethernet-phy@24 { - reg = <24>; - realtek,smi-address = <1>; + phy24: ethernet-phy@1 { + reg = <1>; compatible = "ethernet-phy-ieee802.3-c45"; }; }; &mdio_bus2 { - phy25: ethernet-phy@25 { - reg = <25>; - realtek,smi-address = <2>; + phy25: ethernet-phy@2 { + reg = <2>; compatible = "ethernet-phy-ieee802.3-c45"; }; }; diff --git a/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-a1.dts b/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-a1.dts index 7de9e072db..ca61c675cf 100644 --- a/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-a1.dts +++ b/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-a1.dts @@ -10,10 +10,9 @@ &mdio_bus1 { /* External Aquantia 113C PHYs */ - phy24: ethernet-phy@24 { - reg = <24>; + phy24: ethernet-phy@8 { + reg = <8>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <8>; // Disabled because we do not know how to bring up again // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; #thermal-sensor-cells = <0>; @@ -21,10 +20,9 @@ }; &mdio_bus2 { - phy25: ethernet-phy@25 { - reg = <25>; + phy25: ethernet-phy@8 { + reg = <8>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <8>; // Disabled because we do not know how to bring up again // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; #thermal-sensor-cells = <0>; @@ -32,10 +30,9 @@ }; &mdio_bus3 { - phy26: ethernet-phy@26 { - reg = <26>; + phy26: ethernet-phy@8 { + reg = <8>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <8>; // Disabled because we do not know how to bring up again // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; #thermal-sensor-cells = <0>; diff --git a/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-b1.dts b/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-b1.dts index 739f056370..6ee2dc25a6 100644 --- a/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-b1.dts +++ b/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-b1.dts @@ -9,10 +9,9 @@ }; &mdio_bus1 { - phy24: ethernet-phy@24 { - reg = <24>; + phy24: ethernet-phy@0 { + reg = <0>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <0>; // Disabled because we do not know how to bring up again // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; #thermal-sensor-cells = <0>; @@ -20,10 +19,9 @@ }; &mdio_bus2 { - phy25: ethernet-phy@25 { - reg = <25>; + phy25: ethernet-phy@1 { + reg = <1>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <1>; // Disabled because we do not know how to bring up again // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; #thermal-sensor-cells = <0>; @@ -31,10 +29,9 @@ }; &mdio_bus3 { - phy26: ethernet-phy@26 { - reg = <26>; + phy26: ethernet-phy@2 { + reg = <2>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <2>; // Disabled because we do not know how to bring up again // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; #thermal-sensor-cells = <0>; diff --git a/target/linux/realtek/dts/rtl9303_hasivo_s1100w-8xgt-se.dts b/target/linux/realtek/dts/rtl9303_hasivo_s1100w-8xgt-se.dts index 4e5650ea91..2fb07eb251 100644 --- a/target/linux/realtek/dts/rtl9303_hasivo_s1100w-8xgt-se.dts +++ b/target/linux/realtek/dts/rtl9303_hasivo_s1100w-8xgt-se.dts @@ -132,48 +132,41 @@ reg = <0>; }; - phy8: ethernet-phy@8 { + phy8: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <1>; - reg = <8>; + reg = <1>; }; - phy16: ethernet-phy@16 { + phy16: ethernet-phy@2 { compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <2>; - reg = <16>; + reg = <2>; }; - phy20: ethernet-phy@20 { + phy20: ethernet-phy@3 { compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <3>; - reg = <20>; + reg = <3>; }; }; &mdio_bus3 { - phy24: ethernet-phy@24 { + phy24: ethernet-phy@16 { compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <16>; - reg = <24>; + reg = <16>; }; - phy25: ethernet-phy@25 { + phy25: ethernet-phy@17 { compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <17>; - reg = <25>; + reg = <17>; }; - phy26: ethernet-phy@26 { + phy26: ethernet-phy@18 { compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <18>; - reg = <26>; + reg = <18>; }; - phy27: ethernet-phy@27 { + phy27: ethernet-phy@19 { compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <19>; - reg = <27>; + reg = <19>; }; }; diff --git a/target/linux/realtek/dts/rtl9303_hasivo_s1100wp-8gt-se.dts b/target/linux/realtek/dts/rtl9303_hasivo_s1100wp-8gt-se.dts index 7fb5ee7b0d..13a47a98a4 100644 --- a/target/linux/realtek/dts/rtl9303_hasivo_s1100wp-8gt-se.dts +++ b/target/linux/realtek/dts/rtl9303_hasivo_s1100wp-8gt-se.dts @@ -177,60 +177,52 @@ &mdio_bus0 { /* External RTL8221B PHY */ phy0: ethernet-phy@1 { - reg = <0>; + reg = <1>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <1>; }; /* External RTL8221B PHY */ - phy8: ethernet-phy@8 { - reg = <8>; + phy8: ethernet-phy@2 { + reg = <2>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <2>; }; /* External RTL8221B PHY */ - phy16: ethernet-phy@16 { - reg = <16>; + phy16: ethernet-phy@3 { + reg = <3>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <3>; }; /* External RTL8221B PHY */ - phy20: ethernet-phy@20 { - reg = <20>; + phy20: ethernet-phy@4 { + reg = <4>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <4>; }; }; &mdio_bus1 { /* External RTL8221B PHY */ - phy24: ethernet-phy@24 { - reg = <24>; + phy24: ethernet-phy@1 { + reg = <1>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <1>; }; /* External RTL8221B PHY */ - phy25: ethernet-phy@25 { - reg = <25>; + phy25: ethernet-phy@2 { + reg = <2>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <2>; }; /* External RTL8221B PHY */ - phy26: ethernet-phy@26 { - reg = <26>; + phy26: ethernet-phy@3 { + reg = <3>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <3>; }; /* External RTL8221B PHY */ - phy27: ethernet-phy@27 { - reg = <27>; + phy27: ethernet-phy@4 { + reg = <4>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <4>; }; }; diff --git a/target/linux/realtek/dts/rtl9303_xikestor_sks8300-8t.dts b/target/linux/realtek/dts/rtl9303_xikestor_sks8300-8t.dts index 08ca9a7c92..92586ee2b8 100644 --- a/target/linux/realtek/dts/rtl9303_xikestor_sks8300-8t.dts +++ b/target/linux/realtek/dts/rtl9303_xikestor_sks8300-8t.dts @@ -133,48 +133,41 @@ reg = <0>; }; - phy8: ethernet-phy@8 { + phy8: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c45"; - reg = <8>; - realtek,smi-address = <1>; + reg = <1>; }; - phy16: ethernet-phy@16 { + phy16: ethernet-phy@2 { compatible = "ethernet-phy-ieee802.3-c45"; - reg = <16>; - realtek,smi-address = <2>; + reg = <2>; }; - phy20: ethernet-phy@20 { + phy20: ethernet-phy@3 { compatible = "ethernet-phy-ieee802.3-c45"; - reg = <20>; - realtek,smi-address = <3>; + reg = <3>; }; }; &mdio_bus1 { - phy24: ethernet-phy@24 { + phy24: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c45"; - reg = <24>; - realtek,smi-address = <0>; + reg = <0>; }; - phy25: ethernet-phy@25 { + phy25: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c45"; - reg = <25>; - realtek,smi-address = <1>; + reg = <1>; }; - phy26: ethernet-phy@26 { + phy26: ethernet-phy@2 { compatible = "ethernet-phy-ieee802.3-c45"; - reg = <26>; - realtek,smi-address = <2>; + reg = <2>; }; - phy27: ethernet-phy@27 { + phy27: ethernet-phy@3 { compatible = "ethernet-phy-ieee802.3-c45"; - reg = <27>; - realtek,smi-address = <3>; + reg = <3>; }; }; diff --git a/target/linux/realtek/dts/rtl9311_linksys_lgs352c.dts b/target/linux/realtek/dts/rtl9311_linksys_lgs352c.dts index 1b02d3cb6d..9f530bf379 100644 --- a/target/linux/realtek/dts/rtl9311_linksys_lgs352c.dts +++ b/target/linux/realtek/dts/rtl9311_linksys_lgs352c.dts @@ -179,125 +179,101 @@ }; &mdio_bus1 { - phy24: ethernet-phy@24 { - reg = <24>; + phy24: ethernet-phy@0 { + reg = <0>; compatible = "ethernet-phy-ieee802.3-c22"; - realtek,smi-address = <0>; }; - phy25: ethernet-phy@25 { - reg = <25>; + phy25: ethernet-phy@1 { + reg = <1>; compatible = "ethernet-phy-ieee802.3-c22"; - realtek,smi-address = <1>; }; - phy26: ethernet-phy@26 { - reg = <26>; + phy26: ethernet-phy@2 { + reg = <2>; compatible = "ethernet-phy-ieee802.3-c22"; - realtek,smi-address = <2>; }; - phy27: ethernet-phy@27 { - reg = <27>; + phy27: ethernet-phy@3 { + reg = <3>; compatible = "ethernet-phy-ieee802.3-c22"; - realtek,smi-address = <3>; }; - phy28: ethernet-phy@28 { - reg = <28>; + phy28: ethernet-phy@4 { + reg = <4>; compatible = "ethernet-phy-ieee802.3-c22"; - realtek,smi-address = <4>; }; - phy29: ethernet-phy@29 { - reg = <29>; + phy29: ethernet-phy@5 { + reg = <5>; compatible = "ethernet-phy-ieee802.3-c22"; - realtek,smi-address = <5>; }; - phy30: ethernet-phy@30 { - reg = <30>; + phy30: ethernet-phy@6 { + reg = <6>; compatible = "ethernet-phy-ieee802.3-c22"; - realtek,smi-address = <6>; }; - phy31: ethernet-phy@31 { - reg = <31>; + phy31: ethernet-phy@7 { + reg = <7>; compatible = "ethernet-phy-ieee802.3-c22"; - realtek,smi-address = <7>; }; - phy32: ethernet-phy@32 { - reg = <32>; + phy32: ethernet-phy@8 { + reg = <8>; compatible = "ethernet-phy-ieee802.3-c22"; - realtek,smi-address = <8>; }; - phy33: ethernet-phy@33 { - reg = <33>; + phy33: ethernet-phy@9 { + reg = <9>; compatible = "ethernet-phy-ieee802.3-c22"; - realtek,smi-address = <9>; }; - phy34: ethernet-phy@34 { - reg = <34>; + phy34: ethernet-phy@10 { + reg = <10>; compatible = "ethernet-phy-ieee802.3-c22"; - realtek,smi-address = <10>; }; - phy35: ethernet-phy@35 { - reg = <35>; + phy35: ethernet-phy@11 { + reg = <11>; compatible = "ethernet-phy-ieee802.3-c22"; - realtek,smi-address = <11>; }; - phy36: ethernet-phy@36 { - reg = <36>; + phy36: ethernet-phy@12 { + reg = <12>; compatible = "ethernet-phy-ieee802.3-c22"; - realtek,smi-address = <12>; }; - phy37: ethernet-phy@37 { - reg = <37>; + phy37: ethernet-phy@13 { + reg = <13>; compatible = "ethernet-phy-ieee802.3-c22"; - realtek,smi-address = <13>; }; - phy38: ethernet-phy@38 { - reg = <38>; + phy38: ethernet-phy@14 { + reg = <14>; compatible = "ethernet-phy-ieee802.3-c22"; - realtek,smi-address = <14>; }; - phy39: ethernet-phy@39 { - reg = <39>; + phy39: ethernet-phy@15 { + reg = <15>; compatible = "ethernet-phy-ieee802.3-c22"; - realtek,smi-address = <15>; }; - phy40: ethernet-phy@40 { - reg = <40>; + phy40: ethernet-phy@16 { + reg = <16>; compatible = "ethernet-phy-ieee802.3-c22"; - realtek,smi-address = <16>; }; - phy41: ethernet-phy@41 { - reg = <41>; + phy41: ethernet-phy@17 { + reg = <17>; compatible = "ethernet-phy-ieee802.3-c22"; - realtek,smi-address = <17>; }; - phy42: ethernet-phy@42 { - reg = <42>; + phy42: ethernet-phy@18 { + reg = <18>; compatible = "ethernet-phy-ieee802.3-c22"; - realtek,smi-address = <18>; }; - phy43: ethernet-phy@43 { - reg = <43>; + phy43: ethernet-phy@19 { + reg = <19>; compatible = "ethernet-phy-ieee802.3-c22"; - realtek,smi-address = <19>; }; - phy44: ethernet-phy@44 { - reg = <44>; + phy44: ethernet-phy@20 { + reg = <20>; compatible = "ethernet-phy-ieee802.3-c22"; - realtek,smi-address = <20>; }; - phy45: ethernet-phy@45 { - reg = <45>; + phy45: ethernet-phy@21 { + reg = <21>; compatible = "ethernet-phy-ieee802.3-c22"; - realtek,smi-address = <21>; }; - phy46: ethernet-phy@46 { - reg = <46>; + phy46: ethernet-phy@22 { + reg = <22>; compatible = "ethernet-phy-ieee802.3-c22"; - realtek,smi-address = <22>; }; - phy47: ethernet-phy@47 { - reg = <47>; + phy47: ethernet-phy@23 { + reg = <23>; compatible = "ethernet-phy-ieee802.3-c22"; - realtek,smi-address = <23>; }; }; diff --git a/target/linux/realtek/dts/rtl9312_plasmacloud_common.dtsi b/target/linux/realtek/dts/rtl9312_plasmacloud_common.dtsi index 6ee9bb9b42..d0c9fecb90 100644 --- a/target/linux/realtek/dts/rtl9312_plasmacloud_common.dtsi +++ b/target/linux/realtek/dts/rtl9312_plasmacloud_common.dtsi @@ -250,138 +250,116 @@ compatible = "ethernet-phy-ieee802.3-c45"; }; - phy4: ethernet-phy@4 { + phy4: ethernet-phy@2 { + reg = <2>; + compatible = "ethernet-phy-ieee802.3-c45"; + }; + + phy5: ethernet-phy@3 { + reg = <3>; + compatible = "ethernet-phy-ieee802.3-c45"; + }; + + phy8: ethernet-phy@4 { reg = <4>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <2>; }; - phy5: ethernet-phy@5 { + phy9: ethernet-phy@5 { reg = <5>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <3>; }; - phy8: ethernet-phy@8 { + phy12: ethernet-phy@6 { + reg = <6>; + compatible = "ethernet-phy-ieee802.3-c45"; + }; + + phy13: ethernet-phy@7 { + reg = <7>; + compatible = "ethernet-phy-ieee802.3-c45"; + }; + + phy16: ethernet-phy@8 { reg = <8>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <4>; }; - phy9: ethernet-phy@9 { + phy17: ethernet-phy@9 { reg = <9>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <5>; }; - phy12: ethernet-phy@12 { - reg = <12>; + phy20: ethernet-phy@10 { + reg = <10>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <6>; }; - phy13: ethernet-phy@13 { - reg = <13>; + phy21: ethernet-phy@11 { + reg = <11>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <7>; - }; - - phy16: ethernet-phy@16 { - reg = <16>; - compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <8>; - }; - - phy17: ethernet-phy@17 { - reg = <17>; - compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <9>; - }; - - phy20: ethernet-phy@20 { - reg = <20>; - compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <10>; - }; - - phy21: ethernet-phy@21 { - reg = <21>; - compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <11>; }; }; &mdio_bus1 { - phy24: ethernet-phy@24 { - reg = <24>; + phy24: ethernet-phy@12 { + reg = <12>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <12>; }; - phy25: ethernet-phy@25 { - reg = <25>; + phy25: ethernet-phy@13 { + reg = <13>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <13>; }; - phy28: ethernet-phy@28 { - reg = <28>; + phy28: ethernet-phy@14 { + reg = <14>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <14>; }; - phy29: ethernet-phy@29 { - reg = <29>; + phy29: ethernet-phy@15 { + reg = <15>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <15>; }; - phy32: ethernet-phy@32 { - reg = <32>; + phy32: ethernet-phy@16 { + reg = <16>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <16>; }; - phy33: ethernet-phy@33 { - reg = <33>; + phy33: ethernet-phy@17 { + reg = <17>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <17>; }; - phy36: ethernet-phy@36 { - reg = <36>; + phy36: ethernet-phy@18 { + reg = <18>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <18>; }; - phy37: ethernet-phy@37 { - reg = <37>; + phy37: ethernet-phy@19 { + reg = <19>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <19>; }; - phy40: ethernet-phy@40 { - reg = <40>; + phy40: ethernet-phy@20 { + reg = <20>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <20>; }; - phy41: ethernet-phy@41 { - reg = <41>; + phy41: ethernet-phy@21 { + reg = <21>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <21>; }; - phy44: ethernet-phy@44 { - reg = <44>; + phy44: ethernet-phy@22 { + reg = <22>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <22>; }; - phy45: ethernet-phy@45 { - reg = <45>; + phy45: ethernet-phy@23 { + reg = <23>; compatible = "ethernet-phy-ieee802.3-c45"; - realtek,smi-address = <23>; }; }; diff --git a/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c b/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c index dd22aa1d93..deb6dd5a78 100644 --- a/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c +++ b/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c @@ -181,6 +181,7 @@ struct rtmdio_ctrl { bool raw[RTMDIO_MAX_PHY]; int smi_bus[RTMDIO_MAX_PHY]; int smi_addr[RTMDIO_MAX_PHY]; + struct device_node *phy_node[RTMDIO_MAX_PHY]; bool smi_bus_isc45[RTMDIO_MAX_SMI_BUS]; }; @@ -870,13 +871,67 @@ static int rtmdio_reset(struct mii_bus *bus) return ctrl->cfg->reset(bus); } +static int rtmdio_map_ports(struct device *dev) +{ + struct rtmdio_ctrl *ctrl = dev_get_drvdata(dev); + int bus_addr, addr; + + struct device_node *switch_node __free(device_node) = + of_get_child_by_name(dev->of_node->parent, "ethernet-switch"); + if (!switch_node) + return dev_err_probe(dev, -ENODEV, "%pfwP missing ethernet-switch\n", + of_fwnode_handle(dev->of_node->parent)); + + struct device_node *ports __free(device_node) = + of_get_child_by_name(switch_node, "ethernet-ports"); + if (!ports) + return dev_err_probe(dev, -ENODEV, "%pfwP missing ethernet-ports\n", + of_fwnode_handle(switch_node)); + + for (addr = 0; addr < RTMDIO_MAX_PHY; addr++) + ctrl->smi_bus[addr] = -1; + + for_each_child_of_node_scoped(ports, port) { + if (of_property_read_u32(port, "reg", &addr)) + continue; + + struct device_node *phy __free(device_node) = + of_parse_phandle(port, "phy-handle", 0); + if (!phy) + continue; + + if (addr >= ctrl->cfg->num_phys) + return dev_err_probe(dev, -EINVAL, "%pfwP illegal port number\n", + of_fwnode_handle(port)); + + if (of_property_read_u32(phy, "reg", &ctrl->smi_addr[addr])) + return dev_err_probe(dev, -EINVAL, "%pfwP no phy address\n", + of_fwnode_handle(phy)); + + if (of_property_read_u32(phy->parent, "reg", &bus_addr)) + return dev_err_probe(dev, -EINVAL, "%pfwP no bus address\n", + of_fwnode_handle(phy->parent)); + + if (bus_addr >= RTMDIO_MAX_SMI_BUS) + return dev_err_probe(dev, -EINVAL, "%pfwP illegal bus number\n", + of_fwnode_handle(phy->parent)); + + if (of_device_is_compatible(phy, "ethernet-phy-ieee802.3-c45")) + ctrl->smi_bus_isc45[bus_addr] = true; + + ctrl->smi_bus[addr] = bus_addr; + ctrl->phy_node[addr] = of_node_get(phy); + } + + return 0; +} + static int rtmdio_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - struct device_node *np, *dn[RTMDIO_MAX_PHY]; struct rtmdio_ctrl *ctrl; struct mii_bus *bus; - int ret, addr; + int ret; bus = devm_mdiobus_alloc_size(dev, sizeof(*ctrl)); if (!bus) @@ -888,33 +943,12 @@ static int rtmdio_probe(struct platform_device *pdev) if (IS_ERR(ctrl->map)) return PTR_ERR(ctrl->map); - for (addr = 0; addr < RTMDIO_MAX_PHY; addr++) - ctrl->smi_bus[addr] = -1; - - for_each_node_by_name(np, "ethernet-phy") { - if (of_property_read_u32(np, "reg", &addr)) - continue; - - if (addr < 0 || addr >= ctrl->cfg->num_phys) { - dev_err(dev, "illegal address number %d\n", addr); - of_node_put(np); - return -EINVAL; - } - - of_property_read_u32(np->parent, "reg", &ctrl->smi_bus[addr]); - if (of_property_read_u32(np, "realtek,smi-address", &ctrl->smi_addr[addr])) - ctrl->smi_addr[addr] = addr; - - if (ctrl->smi_bus[addr] < 0 || ctrl->smi_bus[addr] >= RTMDIO_MAX_SMI_BUS) { - dev_err(dev, "illegal SMI bus number %d\n", ctrl->smi_bus[addr]); - of_node_put(np); - return -EINVAL; - } - - if (of_device_is_compatible(np, "ethernet-phy-ieee802.3-c45")) - ctrl->smi_bus_isc45[ctrl->smi_bus[addr]] = true; - - dn[addr] = of_node_get(np); + platform_set_drvdata(pdev, ctrl); + ret = rtmdio_map_ports(dev); + if (ret) { + for_each_phy(ctrl, addr) + of_node_put(ctrl->phy_node[addr]); + return ret; } bus->name = "Realtek MDIO bus"; @@ -935,11 +969,13 @@ static int rtmdio_probe(struct platform_device *pdev) return ret; for_each_phy(ctrl, addr) { - ret = fwnode_mdiobus_register_phy(bus, of_fwnode_handle(dn[addr]), addr); - of_node_put(dn[addr]); - if (ret) - return ret; + if (!ret) + ret = fwnode_mdiobus_register_phy(bus, + of_fwnode_handle(ctrl->phy_node[addr]), addr); + of_node_put(ctrl->phy_node[addr]); } + if (ret) + return ret; if (ctrl->cfg->setup_polling) ctrl->cfg->setup_polling(bus);