forked from mirror/openwrt
airoha: clk: add support of reset controller
This allows us use more easily port en7581 drivers to en7523. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Link: https://github.com/openwrt/openwrt/pull/20365 Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
Mikhail Kshevetskiy
Robert Marko
parent
fe31e5c82a
commit
25c48519cd
4 changed files with 311 additions and 0 deletions
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@ -4,6 +4,7 @@
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/clock/en7523-clk.h>
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#include <dt-bindings/reset/airoha,en7523-reset.h>
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/ {
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interrupt-parent = <&gic>;
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@ -89,6 +90,7 @@
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reg = <0x1fa20000 0x400>,
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<0x1fb00000 0x1000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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gic: interrupt-controller@9000000 {
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@ -0,0 +1,100 @@
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From 38195ddfcea372924a68b64f7a6f9235488160be Mon Sep 17 00:00:00 2001
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From: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
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Date: Sat, 20 Sep 2025 03:57:25 +0300
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Subject: [PATCH 1/3] dt-bindings: clock: airoha: Add reset support to EN7523
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clock binding
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Introduce reset capability to EN7523 device-tree clock binding
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documentation.
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Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
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Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
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---
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.../bindings/clock/airoha,en7523-scu.yaml | 3 +-
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.../dt-bindings/reset/airoha,en7523-reset.h | 61 +++++++++++++++++++
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2 files changed, 62 insertions(+), 2 deletions(-)
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create mode 100644 include/dt-bindings/reset/airoha,en7523-reset.h
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--- a/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml
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+++ b/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml
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@@ -64,8 +64,6 @@ allOf:
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- description: scu base address
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- description: misc scu base address
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- '#reset-cells': false
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-
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- if:
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properties:
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compatible:
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@@ -89,6 +87,7 @@ examples:
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reg = <0x1fa20000 0x400>,
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<0x1fb00000 0x1000>;
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#clock-cells = <1>;
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+ #reset-cells = <1>;
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};
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- |
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--- /dev/null
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+++ b/include/dt-bindings/reset/airoha,en7523-reset.h
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@@ -0,0 +1,61 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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+/*
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+ * Copyright (C) 2024 iopsys Software Solutions AB.
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+ * Copyright (C) 2025 Genexis AB.
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+ *
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+ * Author: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
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+ *
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+ * based on
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+ * include/dt-bindings/reset/airoha,en7581-reset.h
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+ * by Lorenzo Bianconi <lorenzo@kernel.org>
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+ */
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+
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+#ifndef __DT_BINDINGS_RESET_CONTROLLER_AIROHA_EN7523_H_
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+#define __DT_BINDINGS_RESET_CONTROLLER_AIROHA_EN7523_H_
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+
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+/* RST_CTRL2 */
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+#define EN7523_XPON_PHY_RST 0
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+#define EN7523_XSI_MAC_RST 1
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+#define EN7523_XSI_PHY_RST 2
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+#define EN7523_NPU_RST 3
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+#define EN7523_I2S_RST 4
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+#define EN7523_TRNG_RST 5
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+#define EN7523_TRNG_MSTART_RST 6
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+#define EN7523_DUAL_HSI0_RST 7
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+#define EN7523_DUAL_HSI1_RST 8
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+#define EN7523_HSI_RST 9
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+#define EN7523_DUAL_HSI0_MAC_RST 10
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+#define EN7523_DUAL_HSI1_MAC_RST 11
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+#define EN7523_HSI_MAC_RST 12
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+#define EN7523_WDMA_RST 13
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+#define EN7523_WOE0_RST 14
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+#define EN7523_WOE1_RST 15
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+#define EN7523_HSDMA_RST 16
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+#define EN7523_I2C2RBUS_RST 17
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+#define EN7523_TDMA_RST 18
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+/* RST_CTRL1 */
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+#define EN7523_PCM1_ZSI_ISI_RST 19
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+#define EN7523_FE_PDMA_RST 20
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+#define EN7523_FE_QDMA_RST 21
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+#define EN7523_PCM_SPIWP_RST 22
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+#define EN7523_CRYPTO_RST 23
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+#define EN7523_TIMER_RST 24
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+#define EN7523_PCM1_RST 25
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+#define EN7523_UART_RST 26
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+#define EN7523_GPIO_RST 27
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+#define EN7523_GDMA_RST 28
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+#define EN7523_I2C_MASTER_RST 29
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+#define EN7523_PCM2_ZSI_ISI_RST 30
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+#define EN7523_SFC_RST 31
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+#define EN7523_UART2_RST 32
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+#define EN7523_GDMP_RST 33
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+#define EN7523_FE_RST 34
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+#define EN7523_USB_HOST_P0_RST 35
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+#define EN7523_GSW_RST 36
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+#define EN7523_SFC2_PCM_RST 37
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+#define EN7523_PCIE0_RST 38
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+#define EN7523_PCIE1_RST 39
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+#define EN7523_PCIE_HB_RST 40
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+#define EN7523_XPON_MAC_RST 41
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+
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+#endif /* __DT_BINDINGS_RESET_CONTROLLER_AIROHA_EN7523_H_ */
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@ -0,0 +1,177 @@
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From 37de26f9d2f55cd74af55cb29c2860b5989bb728 Mon Sep 17 00:00:00 2001
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From: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
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Date: Sat, 20 Sep 2025 03:57:25 +0300
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Subject: [PATCH 2/3] clk: en7523: Add reset-controller support for EN7523 SoC
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Introduce reset API support to EN7523 clock driver. EN7523 uses the
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same reset logic as EN7581, so just reuse existing code.
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Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
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Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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---
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drivers/clk/clk-en7523.c | 96 ++++++++++++++++++++++++++++------------
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1 file changed, 67 insertions(+), 29 deletions(-)
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--- a/drivers/clk/clk-en7523.c
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+++ b/drivers/clk/clk-en7523.c
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@@ -11,6 +11,7 @@
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#include <linux/regmap.h>
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#include <linux/reset-controller.h>
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#include <dt-bindings/clock/en7523-clk.h>
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+#include <dt-bindings/reset/airoha,en7523-reset.h>
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#include <dt-bindings/reset/airoha,en7581-reset.h>
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#include <dt-bindings/reset/airoha,an7583-reset.h>
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@@ -452,6 +453,53 @@ static const u16 en7581_rst_ofs[] = {
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REG_RST_CTRL1,
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};
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+static const u16 en7523_rst_map[] = {
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+ /* RST_CTRL2 */
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+ [EN7523_XPON_PHY_RST] = 0,
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+ [EN7523_XSI_MAC_RST] = 7,
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+ [EN7523_XSI_PHY_RST] = 8,
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+ [EN7523_NPU_RST] = 9,
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+ [EN7523_I2S_RST] = 10,
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+ [EN7523_TRNG_RST] = 11,
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+ [EN7523_TRNG_MSTART_RST] = 12,
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+ [EN7523_DUAL_HSI0_RST] = 13,
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+ [EN7523_DUAL_HSI1_RST] = 14,
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+ [EN7523_HSI_RST] = 15,
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+ [EN7523_DUAL_HSI0_MAC_RST] = 16,
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+ [EN7523_DUAL_HSI1_MAC_RST] = 17,
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+ [EN7523_HSI_MAC_RST] = 18,
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+ [EN7523_WDMA_RST] = 19,
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+ [EN7523_WOE0_RST] = 20,
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+ [EN7523_WOE1_RST] = 21,
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+ [EN7523_HSDMA_RST] = 22,
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+ [EN7523_I2C2RBUS_RST] = 23,
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+ [EN7523_TDMA_RST] = 24,
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+ /* RST_CTRL1 */
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+ [EN7523_PCM1_ZSI_ISI_RST] = RST_NR_PER_BANK + 0,
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+ [EN7523_FE_PDMA_RST] = RST_NR_PER_BANK + 1,
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+ [EN7523_FE_QDMA_RST] = RST_NR_PER_BANK + 2,
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+ [EN7523_PCM_SPIWP_RST] = RST_NR_PER_BANK + 4,
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+ [EN7523_CRYPTO_RST] = RST_NR_PER_BANK + 6,
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+ [EN7523_TIMER_RST] = RST_NR_PER_BANK + 8,
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+ [EN7523_PCM1_RST] = RST_NR_PER_BANK + 11,
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+ [EN7523_UART_RST] = RST_NR_PER_BANK + 12,
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+ [EN7523_GPIO_RST] = RST_NR_PER_BANK + 13,
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+ [EN7523_GDMA_RST] = RST_NR_PER_BANK + 14,
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+ [EN7523_I2C_MASTER_RST] = RST_NR_PER_BANK + 16,
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+ [EN7523_PCM2_ZSI_ISI_RST] = RST_NR_PER_BANK + 17,
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+ [EN7523_SFC_RST] = RST_NR_PER_BANK + 18,
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+ [EN7523_UART2_RST] = RST_NR_PER_BANK + 19,
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+ [EN7523_GDMP_RST] = RST_NR_PER_BANK + 20,
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+ [EN7523_FE_RST] = RST_NR_PER_BANK + 21,
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+ [EN7523_USB_HOST_P0_RST] = RST_NR_PER_BANK + 22,
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+ [EN7523_GSW_RST] = RST_NR_PER_BANK + 23,
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+ [EN7523_SFC2_PCM_RST] = RST_NR_PER_BANK + 25,
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+ [EN7523_PCIE0_RST] = RST_NR_PER_BANK + 26,
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+ [EN7523_PCIE1_RST] = RST_NR_PER_BANK + 27,
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+ [EN7523_PCIE_HB_RST] = RST_NR_PER_BANK + 29,
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+ [EN7523_XPON_MAC_RST] = RST_NR_PER_BANK + 31,
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+};
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+
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static const u16 en7581_rst_map[] = {
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/* RST_CTRL2 */
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[EN7581_XPON_PHY_RST] = 0,
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@@ -564,6 +612,9 @@ static const u16 an7583_rst_map[] = {
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[AN7583_XPON_MAC_RST] = RST_NR_PER_BANK + 31,
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};
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+static int en7581_reset_register(struct device *dev, struct regmap *map,
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+ const u16 *rst_map, int nr_resets);
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+
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static u32 en7523_get_base_rate(const struct en_clk_desc *desc, u32 val)
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{
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if (!desc->base_bits)
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@@ -942,6 +993,7 @@ static int en7523_clk_hw_init(struct pla
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{
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void __iomem *base, *np_base;
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struct regmap *map, *clk_map;
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+ int err;
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base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(base))
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@@ -961,7 +1013,13 @@ static int en7523_clk_hw_init(struct pla
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if (IS_ERR(clk_map))
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return PTR_ERR(clk_map);
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- return en75xx_register_clocks(&pdev->dev, soc_data, clk_data, map, clk_map);
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+
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+ err = en75xx_register_clocks(&pdev->dev, soc_data, clk_data, map, clk_map);
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+ if (err)
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+ return err;
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+
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+ return en7581_reset_register(&pdev->dev, clk_map, en7523_rst_map,
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+ ARRAY_SIZE(en7523_rst_map));
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}
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static int en7523_reset_update(struct reset_controller_dev *rcdev,
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@@ -1016,7 +1074,8 @@ static const struct reset_control_ops en
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.status = en7523_reset_status,
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};
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-static int en7581_reset_register(struct device *dev, struct regmap *map)
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+static int en7581_reset_register(struct device *dev, struct regmap *map,
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+ const u16 *rst_map, int nr_resets)
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{
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struct en_rst_data *rst_data;
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@@ -1025,10 +1084,10 @@ static int en7581_reset_register(struct
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return -ENOMEM;
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rst_data->bank_ofs = en7581_rst_ofs;
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- rst_data->idx_map = en7581_rst_map;
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+ rst_data->idx_map = rst_map;
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rst_data->map = map;
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- rst_data->rcdev.nr_resets = ARRAY_SIZE(en7581_rst_map);
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+ rst_data->rcdev.nr_resets = nr_resets;
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rst_data->rcdev.of_xlate = en7523_reset_xlate;
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rst_data->rcdev.ops = &en7581_reset_ops;
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rst_data->rcdev.of_node = dev->of_node;
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@@ -1073,30 +1132,8 @@ static int en7581_clk_hw_init(struct pla
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regmap_update_bits(clk_map, REG_NP_SCU_PCIC, REG_PCIE_CTRL,
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FIELD_PREP(REG_PCIE_CTRL, 3));
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- return en7581_reset_register(&pdev->dev, clk_map);
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-}
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-
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-static int an7583_reset_register(struct device *dev, struct regmap *map)
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-{
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- struct en_rst_data *rst_data;
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-
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- rst_data = devm_kzalloc(dev, sizeof(*rst_data), GFP_KERNEL);
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- if (!rst_data)
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- return -ENOMEM;
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-
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- rst_data->bank_ofs = en7581_rst_ofs;
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- rst_data->idx_map = an7583_rst_map;
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- rst_data->map = map;
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-
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- rst_data->rcdev.nr_resets = ARRAY_SIZE(an7583_rst_map);
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- rst_data->rcdev.of_xlate = en7523_reset_xlate;
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- rst_data->rcdev.ops = &en7581_reset_ops;
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- rst_data->rcdev.of_node = dev->of_node;
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- rst_data->rcdev.of_reset_n_cells = 1;
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- rst_data->rcdev.owner = THIS_MODULE;
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- rst_data->rcdev.dev = dev;
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-
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- return devm_reset_controller_register(dev, &rst_data->rcdev);
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+ return en7581_reset_register(&pdev->dev, clk_map, en7581_rst_map,
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+ ARRAY_SIZE(en7581_rst_map));
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}
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static int an7583_clk_hw_init(struct platform_device *pdev,
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@@ -1129,7 +1166,8 @@ static int an7583_clk_hw_init(struct pla
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regmap_update_bits(clk_map, REG_NP_SCU_PCIC, REG_PCIE_CTRL,
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FIELD_PREP(REG_PCIE_CTRL, 3));
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- return an7583_reset_register(dev, clk_map);
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+ return en7581_reset_register(dev, clk_map, an7583_rst_map,
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+ ARRAY_SIZE(an7583_rst_map));
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}
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static int en7523_clk_probe(struct platform_device *pdev)
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@ -0,0 +1,32 @@
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From 6e5e3a8e20d12f60a1b902160b92337b392b1c18 Mon Sep 17 00:00:00 2001
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From: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
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Date: Sat, 20 Sep 2025 03:57:25 +0300
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Subject: [PATCH 3/3] ARM: dts: airoha: update EN7523 dtsi to support resets
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This patch updates EN7523 dtsi to reflect the reset-controller
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support for EN7523 SoC.
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Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
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Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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---
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arch/arm/boot/dts/airoha/en7523.dtsi | 2 ++
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1 file changed, 2 insertions(+)
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--- a/arch/arm/boot/dts/airoha/en7523.dtsi
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+++ b/arch/arm/boot/dts/airoha/en7523.dtsi
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@@ -4,6 +4,7 @@
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/clock/en7523-clk.h>
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+#include <dt-bindings/reset/airoha,en7523-reset.h>
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/ {
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interrupt-parent = <&gic>;
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@@ -91,6 +92,7 @@
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reg = <0x1fa20000 0x400>,
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<0x1fb00000 0x1000>;
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#clock-cells = <1>;
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+ #reset-cells = <1>;
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};
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gic: interrupt-controller@9000000 {
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