forked from mirror/openwrt
mpc85xx: fix dtc warnings
Even though these are disabled, dtc still warns on missing reg and ranges. Add them. No real difference as it's disabled anyway. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://github.com/openwrt/openwrt/pull/20990 Signed-off-by: Robert Marko <robimarko@gmail.com>
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8 changed files with 50 additions and 15 deletions
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@ -226,7 +226,6 @@
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};
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enet0: ethernet@b0000 {
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status = "okay";
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phy-connection-type = "rgmii-id";
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nvmem-cells = <&macaddr_hwinfo_0 0>;
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nvmem-cell-names = "mac-address";
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@ -259,13 +258,27 @@
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};
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pci0: pcie@ffe09000 {
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reg = <0 0xffe09000 0 0x1000>;
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ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
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0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
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status = "disabled";
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pcie@0 {
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ranges = <0x2000000 0x0 0xa0000000
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0x2000000 0x0 0xa0000000
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0x0 0x20000000
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0x1000000 0x0 0x0
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0x1000000 0x0 0x0
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0x0 0x100000>;
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};
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};
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pci1: pcie@ffe0a000 {
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reg = <0x0 0xffe0a000 0x0 0x1000>;
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ranges = <0x2000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000
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0x1000000 0x0 0x00000000 0x0 0xffc20000 0x0 0x10000>;
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0x1000000 0x0 0x00000000 0x0 0xffc20000 0x0 0x10000>;
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reset-gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
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@ -232,7 +232,22 @@
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};
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pci0: pcie@ffe09000 {
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reg = <0 0xffe09000 0 0x1000>;
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ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
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0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
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status = "disabled";
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pcie@0 {
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ranges = <0x2000000 0x0 0xa0000000
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0x2000000 0x0 0xa0000000
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0x0 0x20000000
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0x1000000 0x0 0x0
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0x1000000 0x0 0x0
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0x0 0x100000>;
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};
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};
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pci1: pcie@ffe0a000 {
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@ -49,7 +49,6 @@
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d-cache-sets = <0x80>;
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d-cache-size = <0x8000>;
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d-cache-block-size = <0x20>;
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status = "okay";
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clock-frequency = <533333328>; /* 533.33 MHz */
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bus-frequency = <266666664>; /* 266.66 MHz */
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timebase-frequency = <33333333>; /* 33.33 MHz */
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@ -130,8 +129,6 @@
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ranges = <0x0 0x0 0x0 0xec000000 0x4000000>;
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nor@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "cfi-flash";
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reg = <0x0 0x0 0x4000000>;
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bank-width = <2>;
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@ -334,7 +331,6 @@
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rx-stash-idx = <0x00>;
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rx-stash-len = <0x60>;
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bd-stash;
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status = "okay";
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phy-handle = <&phy0>;
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phy-connection-type = "rgmii-id";
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nvmem-cells = <&macaddr_hwinfo_0 0>;
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@ -349,7 +345,6 @@
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rx-stash-idx = <0x00>;
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rx-stash-len = <0x60>;
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bd-stash;
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status = "okay";
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phy-handle = <&phy1>;
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phy-connection-type = "rgmii-id";
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nvmem-cells = <&macaddr_hwinfo_0 1>;
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@ -194,13 +194,28 @@
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};
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pci0: pcie@ffe09000 {
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reg = <0 0xffe09000 0 0x1000>;
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ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
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0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
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status = "disabled";
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pcie@0 {
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ranges = <0x2000000 0x0 0xa0000000
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0x2000000 0x0 0xa0000000
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0x0 0x20000000
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0x1000000 0x0 0x0
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0x1000000 0x0 0x0
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0x0 0x100000>;
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};
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};
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pci1: pcie@ffe0a000 {
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reg = <0 0xffe0a000 0 0x1000>;
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ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
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0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
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pcie@0 {
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ranges = <0x2000000 0x0 0x80000000
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0x2000000 0x0 0x80000000
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@ -391,6 +391,8 @@
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};
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ifc: ifc@ffe1e000 {
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reg = <0x0 0xffe1e000 0 0x2000>;
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status = "disabled";
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};
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@ -67,8 +67,6 @@
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ranges = <0x0 0x0 0x0 0xee000000 0x2000000>;
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nor@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "cfi-flash";
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reg = <0x0 0x0 0x2000000>;
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bank-width = <2>;
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@ -207,7 +205,6 @@
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i-cache-size = <0x8000>;
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i-cache-sets = <0x80>;
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cpu-release-addr = <0x0 0x0ffff280>;
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status = "okay";
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enable-method = "spin-table";
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};
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@ -140,6 +140,9 @@
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};
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ifc: ifc@ffe1e000 {
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reg = <0x0 0xffe1e000 0 0x2000>;
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status = "disabled";
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};
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pci0: pcie@ffe09000 {
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@ -94,8 +94,6 @@
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ranges = <0x0 0x0 0x0 0xec000000 0x4000000>;
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nor@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "cfi-flash";
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reg = <0x0 0x0 0x4000000>;
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bank-width = <2>;
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@ -176,7 +174,6 @@
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};
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enet0: ethernet@b0000 {
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status = "okay";
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phy-handle = <&phy0>;
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phy-connection-type = "rgmii-id";
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};
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@ -186,7 +183,6 @@
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};
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enet2: ethernet@b2000 {
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status = "okay";
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phy-handle = <&phy2>;
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phy-connection-type = "rgmii-id";
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};
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@ -286,7 +282,6 @@
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i-cache-size = <0x8000>;
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i-cache-sets = <0x80>;
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cpu-release-addr = <0x0 0x0ffff280>;
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status = "okay";
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enable-method = "spin-table";
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};
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